Remove pci_ats_enabled(). There are no callers outside the ATS code
itself. We don't need to check ats_cap, because if we don't find an ATS
capability, we'll never set ats_enabled.
Signed-off-by: Bjorn Helgaas
---
drivers/pci/ats.c |6 +++---
include/linux/pci.h |
[+cc Tejun, linux-ide]
On Thu, Jul 23, 2015 at 11:22 PM, Andreas Hartmann
wrote:
> On Tue, Jul 21, 2015 at 06:35PM +0200, Joerg Roedel wrote:
>> On Tue, Jul 21, 2015 at 06:20:23PM +0200, Andreas Hartmann wrote:
>>> [ 48.193901] <6>[fglrx] Firegl kernel thread PID: 1840
>>> [ 48.193985] <6>[fg
Hi Don,
On Mon, Jul 27, 2015 at 10:00:53AM -0400, Don Dutile wrote:
> On 07/20/2015 08:15 PM, Bjorn Helgaas wrote:
> >Stop caching the Invalidate Queue Depth in struct pci_dev.
> >pci_ats_queue_depth() is typically called only once per device, and it
> >returns a fixed
Hi Joerg,
Thanks for all your help reviewing this!
On Mon, Jul 27, 2015 at 03:08:10PM +0200, Joerg Roedel wrote:
> On Mon, Jul 20, 2015 at 07:13:57PM -0500, Bjorn Helgaas wrote:
> > We check the ATS state (enabled/disabled) and fetch the PCI ATS Invalidate
> > Queue Depth
On Mon, Jul 20, 2015 at 07:13:49PM -0500, Bjorn Helgaas wrote:
> Gregor reported a deadlock [1] when enabling a VF that supports ATS.
> This series is intended to fix that. The second patch should be enough to
> fix the deadlock; the rest are simplification and cleanup.
>
> The
On Wed, Jul 22, 2015 at 04:39:55PM -0500, Will Davis wrote:
> Adds an interface to find the first device which is upstream of both
> devices.
>
> Signed-off-by: Will Davis
> ---
> drivers/pci/search.c | 25 +
> include/linux/pci.h | 2 ++
> 2 files changed, 27 insertion
On Wed, Jul 22, 2015 at 04:39:54PM -0500, Will Davis wrote:
> Implement 'map_peer_resource' for the Intel IOMMU driver. Simply translate
> the resource to a physical address and route it to the same handlers used
> by the 'map_page' API.
>
> This allows a device to map another's resource, to enabl
On Wed, Jul 22, 2015 at 04:39:52PM -0500, Will Davis wrote:
> This function takes a struct pci_bus * and returns the associated struct
> pci_host_bridge * upstream.
Nits: for the PCI parts, please run "git log --oneline" and make yours
match the style of the previous history. Same for the changel
On Thu, Aug 06, 2015 at 06:06:34PM -0700, Yinghai Lu wrote:
> On Thu, Aug 6, 2015 at 9:03 AM, Yinghai Lu wrote:
> > On Wed, Jul 29, 2015 at 9:07 AM, Bjorn Helgaas wrote:
> >>>
> >>> Bjorn Helgaas (11):
> >>> iommu/vt-d: Cache PCI ATS sta
ace
- Add PF refcount of how many associated VFs have ATS enabled
- Add comment that ATS must be enabled on PF before on VFs
- Require ATS to be disabled on all VFs and PF before changing STU
---
Bjorn Helgaas (11):
iommu/vt-d: Cache PCI ATS state and Invalidate Queue Depth
P
The ATS setup code in ats_alloc_one() is only used by pci_ats_init(), so
inline it there. No functional change.
Signed-off-by: Bjorn Helgaas
Reviewed-by: Joerg Roedel
---
drivers/pci/ats.c |7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/pci/ats.c b/drivers
e the PF controls the STU for all the VFs.
Link: http://permalink.gmane.org/gmane.linux.kernel.iommu/9433
Reported-by: Gregor Dick
Signed-off-by: Bjorn Helgaas
Reviewed-by: Joerg Roedel
---
drivers/pci/ats.c | 98 ---
drivers/pci/probe.c
The pci_ats struct is small and will get smaller, so I don't think it's
worth allocating it separately from the pci_dev struct.
Embed the ATS fields directly into struct pci_dev.
Signed-off-by: Bjorn Helgaas
Reviewed-by: Joerg Roedel
---
drivers/pci/ats.c
The extended capabilities list is linked with 12-bit pointers, and the ATS
Smallest Translation Unit and Invalidate Queue Depth fields are both 5
bits.
Use u16 and u8 to hold the extended capability address and the stu and qdep
values. No functional change.
Signed-off-by: Bjorn Helgaas
_info struct. This is similar to what
amd_iommu.c does.
Signed-off-by: Bjorn Helgaas
---
drivers/iommu/intel-iommu.c | 28 ++--
1 file changed, 18 insertions(+), 10 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index a98a7b2..c22a549 1
Use the pci_physfn() helper rather than looking up physfn by hand.
No functional change.
Signed-off-by: Bjorn Helgaas
Reviewed-by: Joerg Roedel
---
drivers/pci/ats.c |8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c
index
Remove pci_ats_enabled(). There are no callers outside the ATS code
itself. We don't need to check ats_cap, because if we don't find an ATS
capability, we'll never set ats_enabled.
Signed-off-by: Bjorn Helgaas
Reviewed-by: Joerg Roedel
---
drivers/pci/ats.c |8
We previously returned -ENODEV for devices that don't support ATS (except
that we always returned 0 for VFs, whether or not they support ATS).
For consistency, always return -EINVAL (not -ENODEV) if the device doesn't
support ATS. Return zero for VFs that support ATS.
Signed-off
here now.
Clean up these error paths.
Signed-off-by: Bjorn Helgaas
---
drivers/pci/ats.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c
index 0b5b0ed..0f05274 100644
--- a/drivers/pci/ats.c
+++ b/drivers/pci/ats.
Move ATS declarations to linux/pci.h so they're all in one place.
Signed-off-by: Bjorn Helgaas
Reviewed-by: Joerg Roedel
---
include/linux/pci-ats.h | 41 -
include/linux/pci.h | 10 +-
2 files changed, 9 insertions(+), 42 dele
Stop caching the Invalidate Queue Depth in struct pci_dev.
pci_ats_queue_depth() is typically called only once per device, and it
returns a fixed value per-device, so callers who need the value frequently
can cache it themselves.
Signed-off-by: Bjorn Helgaas
Reviewed-by: Joerg Roedel
On Tue, Aug 11, 2015 at 10:50:59AM -0500, Bjorn Helgaas wrote:
> Gregor reported a deadlock [1] when enabling a VF that supports ATS.
> This series is intended to fix that. The second patch should be enough to
> fix the deadlock; the rest are simplification and cleanup.
>
> The
Hi Will,
On Tue, Sep 15, 2015 at 12:10:45PM -0500, Will Davis wrote:
> Hi,
>
> This is the sixth version of a patchset to add the DMA APIs necessary to
> map and unmap a PCI device's BAR to and from another PCI device's IOVA
> domain. This enables PCI peer-to-peer traffic on x86 platforms where a
On Tue, Sep 15, 2015 at 12:10:55PM -0500, Will Davis wrote:
> Add helper to convert a struct resource to a peer DMA address.
>
> Signed-off-by: Will Davis
> ---
> include/linux/pci.h | 16
> 1 file changed, 16 insertions(+)
>
> diff --git a/include/linux/pci.h b/include/linux/p
On Tue, Sep 15, 2015 at 12:10:54PM -0500, Will Davis wrote:
> Add checks for topology and ACS configuration to determine whether or not
> peer traffic should be supported between two PCI devices.
>
> Signed-off-by: Will Davis
> ---
> drivers/pci/pci.c | 99
> ++
[+cc Konrad, Joerg, iommu list]
On Fri, Oct 02, 2015 at 04:20:16PM +0200, Christian Melki wrote:
> I discovered a strange error on my machine. 32-bit PAE 4.2.0 without
> IOMMU code (yeah, I know).
> When writing to an ext4 filesystem on a USB disk my kernel would hang
> and not return control to u
[+cc Joerg, iommu list]
Hi Andreas,
On Thu, Feb 04, 2016 at 03:53:20PM +0100, Andreas Hartmann wrote:
> Hello!
>
> The following happens with Linux 4.4.1 during boot on an MSI A78M-E35
> board. Additionally, I attached the complete dmesg.
Thanks a lot for the report! I cc'd some folks who know
[+cc Alex, iommu list]
On Mon, Feb 15, 2016 at 03:35:00AM +0530, Jayachandran C wrote:
> Add a new flag PCI_DEV_FLAGS_BRIDGE_SKIP_ALIAS to indicate bridges
> that should not be considered during DMA alias search. This is
> to support hardware (in this case Broadcom Vulcan PCIe subsystem)
> that ha
On Wed, Feb 24, 2016 at 01:44:06PM -0600, Bjorn Helgaas wrote:
> From: Jacek Lawrynowicz
>
>
(Sorry, I should have copied this changelog in the patch; I copied
this manually from your v3 posting):
> This patch solves IOMMU support issues with PCIe non-transparent bridges
> tha
On Thu, Feb 25, 2016 at 03:41:51PM +, Lawrynowicz, Jacek wrote:
> > -Original Message-
> > From: Bjorn Helgaas [mailto:helg...@kernel.org]
> > Sent: Thursday, February 25, 2016 3:39 PM
> > To: Bjorn Helgaas
> > Cc: Lawrynowicz, Jacek ; linux-
> > p
On Fri, Apr 14, 2017 at 4:06 PM, Jayachandran C
wrote:
> On Thu, Apr 13, 2017 at 07:19:11PM -0500, Bjorn Helgaas wrote:
>> I tentatively applied both patches to pci/host-thunder for v4.12.
>>
>> However, I am concerned about the topology here:
>>
>> On Thu,
On Mon, Apr 17, 2017 at 12:47 PM, Jayachandran C
wrote:
> On Fri, Apr 14, 2017 at 09:00:06PM -0500, Bjorn Helgaas wrote:
>> On Fri, Apr 14, 2017 at 4:06 PM, Jayachandran C
>> wrote:
>> > On Thu, Apr 13, 2017 at 07:19:11PM -0500, Bjorn Helgaas wrote:
>> >> I
On Wed, Apr 19, 2017 at 7:25 PM, Jon Masters wrote:
> One additional footnote. I spent a bunch of time recently on my personal
> Xeon systems walking through the PCIe topology and aligning on how to
> advise the ARM server community proceed going forward. If you look at
> how Intel vs AMD handle t
On Mon, Apr 17, 2017 at 12:47 PM, Jayachandran C
wrote:
> On Fri, Apr 14, 2017 at 09:00:06PM -0500, Bjorn Helgaas wrote:
>> On Fri, Apr 14, 2017 at 4:06 PM, Jayachandran C
>> wrote:
>> > On Thu, Apr 13, 2017 at 07:19:11PM -0500, Bjorn Helgaas wrote:
>> >> I
On Tue, Apr 25, 2017 at 8:03 AM, Jayachandran C
wrote:
> On Fri, Apr 21, 2017 at 12:57:05PM -0500, Bjorn Helgaas wrote:
>> I did notice that all the Root Port devices claim to *not* be connected to
>> slots, which doesn't seem right. For example,
>>
>> 12:00.0
in
> Cc: Jarkko Sakkinen
> Cc: Jani Nikula
> Cc: Ben Skeggs
> Cc: Benjamin Tissoires
> Cc: Joerg Roedel
> Cc: Adrian Hunter
> Cc: Yisen Zhuang
> Cc: Bjorn Helgaas
> Cc: Zhang Rui
> Cc: Felipe Balbi
> Cc: Mathias Nyman
> Cc: Heikki Krogerus
> Cc
On Mon, May 22, 2017 at 11:39 AM, Oza Pawandeep wrote:
> This patch adds support for inbound memory window
> for PCI RC drivers.
>
> It defines new function pci_create_root_bus2 which
> takes inbound resources as an argument and fills in the
> memory resource to PCI internal host bridge structure
On Wed, May 31, 2017 at 11:17 AM, Oza Oza wrote:
> On Wed, May 31, 2017 at 4:12 AM, Bjorn Helgaas wrote:
>> On Mon, May 22, 2017 at 11:39 AM, Oza Pawandeep wrote:
>>> This patch adds support for inbound memory window
>>> for PCI RC drivers.
>>>
>>>
[+cc Joerg, iommu]
On Fri, Jun 30, 2017 at 12:24 AM, Alexey Kardashevskiy wrote:
> From: Yongji Xie
>
> Some iommu drivers would be initialized after PCI device
> enumeration. So PCI_BUS_FLAGS_MSI_REMAP would not be set
> when probing PCI devices although IOMMU enables capability
> of IRQ remapp
On Thu, Jan 14, 2016 at 4:03 AM, Joerg Roedel wrote:
> On Wed, Jan 13, 2016 at 09:28:25PM +, David Woodhouse wrote:
>> Acked-by: David Woodhouse
>>
>> Strictly speaking, this is more in PCI code than IOMMU code. And it
>> doesn't actually touch the Intel VT-d code at all; the subject is a bit
On Wed, Jan 13, 2016 at 1:28 PM, David Woodhouse wrote:
> On Mon, 2016-01-11 at 14:20 +0100, Jacek Lawrynowicz wrote:
>> This patch solves IOMMU support issues with PCIe non-transparent bridges
>> that use Requester ID look-up tables (LUT), e.g. PEX8733. Before exiting
>> the bridge, packet's RID
From: Jacek Lawrynowicz
---
drivers/iommu/iommu.c | 17 ++---
drivers/pci/pci.c | 11 +--
drivers/pci/probe.c |1 +
drivers/pci/search.c | 14 +-
include/linux/pci.h |4 +---
5 files changed, 30 insertions(+), 17 deletions(-)
diff --git a/
From: Jacek Lawrynowicz
Add a pci_add_dma_alias() interface to encapsulate the details of adding an
alias. No functional change intended.
---
drivers/pci/pci.c| 14 ++
drivers/pci/pci.h|2 ++
drivers/pci/quirks.c | 19 +++
3 files changed, 23 insertio
From: Jacek Lawrynowicz
One of the quirks that adds DMA aliases logs an informational message in
dmesg. Move that to pci_add_dma_alias() so all users log the message
consistently. No functional change intended (except extra message).
---
drivers/pci/pci.c|2 ++
drivers/pci/quirks.c |
e two pci_devs
- Rename dma_alias_is_enabled() to indicate PCI context
The only remaining thing I want to sort out is the dma_alias_is_enabled()
vs pci_for_each_dma_alias() question Alex raised. I'll respond to the
relevant part of the patch in this series with my specific questions.
This should be folded into the previous patch. I left it separate to show
the interface difference more clearly.
Also, pci_devs_are_dma_aliases() uses PCI internals (dma_alias_mask), so I
think it should be in PCI code instead of in IOMMU code. That would mean
both it and pci_add_dma_alias() sho
From: Jacek Lawrynowicz
After removing PCI_DEV_FLAGS_DMA_ALIAS_DEVFN, the (1 << 4) value was
unused. Squash the other values so all the bits are adjacent. No
functional change intended.
(I'm not sure this is worth doing. We have 16 flag bits and we're not
even close to exhausting them. But i
From: Jacek Lawrynowicz
MIC x200 NTB forwards PCIe traffic using multiple alien RID. They have to
be added as aliases to the DMA device in order to allow buffer access
when IOMMU is enabled.
Signed-off-by: Jacek Lawrynowicz
Acked-by: David Woodhouse
---
drivers/pci/quirks.c | 13 +++
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