Re: [PATCH] Revert "dma-contiguous: do not allocate a single page from CMA area"

On Tue, 26 Feb 2019 at 21:25, Nicolin Chen wrote: > > This reverts commit d222e42e88168fd67e6d131984b86477af1fc256. > > The original change breaks omap dss: > omapdss_dispc 58001000.dispc: > dispc_errata_i734_wa_init: dma_alloc_writecombine failed > > Let's revert it first and then fin

Re: [PATCH] Revert "dma-contiguous: do not allocate a single page from CMA area"

On 26/02/2019 20:23, Nicolin Chen wrote: > This reverts commit d222e42e88168fd67e6d131984b86477af1fc256. > > The original change breaks omap dss: > omapdss_dispc 58001000.dispc: > dispc_errata_i734_wa_init: dma_alloc_writecombine failed > > Let's revert it first and then find a safe

Re: [PATCH 05/13] memory: mtk-smi: Add device-link between smi-larb and smi-common

On Mon, 2019-02-25 at 15:54 -0800, Evan Green wrote: > On Mon, Dec 31, 2018 at 8:52 PM Yong Wu wrote: > > > > Normally, If the smi-larb HW need work, we should enable the smi-common > > HW power and clock firstly. > > This patch adds device-link between the smi-larb dev and the smi-common > > dev.

Re: [PATCH 02/13] driver core: Remove the link if there is no driver with AUTO flag

On Mon, 2019-02-25 at 15:53 -0800, Evan Green wrote: > On Mon, Dec 31, 2018 at 8:52 PM Yong Wu wrote: > > > > DL_FLAG_AUTOREMOVE_CONSUMER/SUPPLIER means "Remove the link > > automatically on consumer/supplier driver unbind", that means we should > > remove whole the device_link when there is no th

Re: [PATCH 11/13] iommu/mediatek: Use builtin_platform_driver

On Mon, 2019-02-25 at 15:56 -0800, Evan Green wrote: > On Mon, Dec 31, 2018 at 8:53 PM Yong Wu wrote: > > > > MediaTek IOMMU should wait for smi larb which need wait for the > > power domain(mtk-scpsys.c) and the multimedia ccf who both are > > module init. Thus, subsys_initcall for MediaTek IOMMU

Re: [PATCH 03/13] iommu/mediatek: Add probe_defer for smi-larb

On Mon, 2019-02-25 at 15:54 -0800, Evan Green wrote: > On Mon, Dec 31, 2018 at 8:52 PM Yong Wu wrote: > > > > The iommu consumer should use device_link to connect with the > > smi-larb(supplier). then the smi-larb should run before the iommu > > consumer. Here we delay the iommu driver until the s

Re: [PATCH 04/13] iommu/mediatek: Add device_link between the consumer and the larb devices

On Mon, 2019-02-25 at 15:54 -0800, Evan Green wrote: > On Mon, Dec 31, 2018 at 8:52 PM Yong Wu wrote: > > > > MediaTek IOMMU don't have its power-domain. all the consumer connect > > with smi-larb, then connect with smi-common. > > > > M4U > > | > > smi-common > > | >

[PATCH V6 2/3] IOMMU/Hyper-V: Add Hyper-V stub IOMMU driver

From: Lan Tianyu On the bare metal, enabling X2APIC mode requires interrupt remapping function which helps to deliver irq to cpu with 32-bit APIC ID. Hyper-V doesn't provide interrupt remapping function so far and Hyper-V MSI protocol already supports to deliver interrupt to the CPU whose virtual

[PATCH V6 0/3] x86/Hyper-V/IOMMU: Add Hyper-V IOMMU driver to support x2apic mode

From: Lan Tianyu On the bare metal, enabling X2APIC mode requires interrupt remapping function which helps to deliver irq to cpu with 32-bit APIC ID. Hyper-V doesn't provide interrupt remapping function so far and Hyper-V MSI protocol already supports to deliver interrupt to the CPU whose virtual

[PATCH V6 1/3] x86/Hyper-V: Set x2apic destination mode to physical when x2apic is available

From: Lan Tianyu Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic, set x2apic destination mode to physcial mode when x2apic is available and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs have 8-bit APIC id. Reviewed-by: Thomas Gleixner Reviewed-by: Michael K

RE: [PATCH V6 1/3] x86/Hyper-V: Set x2apic destination mode to physical when x2apic is available

From: Tianyu Lan Sent: Wednesday, February 27, 2019 6:54 AM > > Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic, > set x2apic destination mode to physcial mode when x2apic is available > and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs have > 8-bit APIC id.

RE: [PATCH V6 2/3] IOMMU/Hyper-V: Add Hyper-V stub IOMMU driver

From: lantianyu1...@gmail.com Sent: Wednesday, February 27, 2019 6:54 AM > > On the bare metal, enabling X2APIC mode requires interrupt remapping > function which helps to deliver irq to cpu with 32-bit APIC ID. > Hyper-V doesn't provide interrupt remapping function so far and Hyper-V > MSI prot

Re: [PATCH 04/13] iommu/mediatek: Add device_link between the consumer and the larb devices

On 01/01/2019 04:51, Yong Wu wrote: MediaTek IOMMU don't have its power-domain. all the consumer connect with smi-larb, then connect with smi-common. M4U | smi-common | - | |... | | larb1 larb2 | | vdec

Re: [PATCH 1/1] iommu: Bind process address spaces to devices

On Tue, 26 Feb 2019 12:17:43 +0100 Joerg Roedel wrote: > Hi Jean-Philippe, > > Thanks for the patch! I think this is getting close to be applied > after the next merge window. > > On Wed, Feb 20, 2019 at 02:27:59PM +, Jean-Philippe Brucker wrote: > > +int iommu_sva_bind_device(struct device

[PATCH v2] iommu: io-pgtable: Add ARM Mali midgard MMU page table format

ARM Mali midgard GPU page tables are similar to standard 64-bit stage 1 page tables, but have a few differences. Add a new format type to represent the format. The input address size is 48-bits and the output address size is 40-bits (and possibly less?). Note that the later bifrost GPUs follow the

RE: [PATCH 1/1] iommu: Bind process address spaces to devices

> From: Jacob Pan [mailto:jacob.jun@linux.intel.com] > Sent: Thursday, February 28, 2019 5:41 AM > > On Tue, 26 Feb 2019 12:17:43 +0100 > Joerg Roedel wrote: > > > > > How about a 'struct iommu_sva' with an iommu-private definition that > > is returned by this function: > > > > struct io