Re: [PATCH v2] arm64/dma-mapping: fix DMA_ATTR_FORCE_CONTIGUOUS mmaping code

2017-04-03 Thread Andrzej Hajda
Hi Russel, On 31.03.2017 13:16, Russell King - ARM Linux wrote: > On Fri, Mar 31, 2017 at 01:02:51PM +0200, Andrzej Hajda wrote: >> In this version of the patch I have replaced temporal pages and >> iommu_dma_mmap with remap_pfn_range or rather its simplified version >> vm_iomap_memory. >> Unfort

Re: [RFC PATCH 04/30] iommu/arm-smmu-v3: Add support for PCI ATS

2017-04-03 Thread Sunil Kovvuri
> +static size_t arm_smmu_atc_invalidate_domain(struct arm_smmu_domain > *smmu_domain, > +unsigned long iova, size_t size) > +{ > + unsigned long flags; > + struct arm_smmu_cmdq_ent cmd = {0}; > + struct arm_smmu_group *smmu_group; > +

Re: [RFC PATCH 04/30] iommu/arm-smmu-v3: Add support for PCI ATS

2017-04-03 Thread Jean-Philippe Brucker
On 03/04/17 09:34, Sunil Kovvuri wrote: >> +static size_t arm_smmu_atc_invalidate_domain(struct arm_smmu_domain >> *smmu_domain, >> +unsigned long iova, size_t size) >> +{ >> + unsigned long flags; >> + struct arm_smmu_cmdq_ent cmd = {0}; >>

Re: [PATCH] iommu/rockchip: Make use of 'struct iommu_device'

2017-04-03 Thread Heiko Stübner
Hi Joerg, Am Freitag, 31. März 2017, 16:30:24 CEST schrieb Joerg Roedel: > From: Joerg Roedel > > Register hardware IOMMUs seperatly with the iommu-core code > and add a sysfs representation of the iommu topology. > > Signed-off-by: Joerg Roedel In general works, and I still keep a working io

Re: [PATCH RESEND 0/3] IOVA allocation improvements for iommu-dma

2017-04-03 Thread Joerg Roedel
On Fri, Mar 31, 2017 at 03:46:04PM +0100, Robin Murphy wrote: > Robin Murphy (3): > iommu/dma: Convert to address-based allocation > iommu/dma: Clean up MSI IOVA allocation > iommu/dma: Plumb in the per-CPU IOVA caches > > drivers/iommu/dma-iommu.c | 176 > -

Re: [PATCH] iommu/rockchip: Make use of 'struct iommu_device'

2017-04-03 Thread Joerg Roedel
Hey Heiko, On Mon, Apr 03, 2017 at 11:56:59AM +0200, Heiko Stübner wrote: > In general works, and I still keep a working iommu-based display :-) > I can also see my two vop iommus under /sys/class/iommu now. Great, thanks for testing that patch! > Links in the devices subdirectory do not work th

Re: [PATCH] iommu/rockchip: Make use of 'struct iommu_device'

2017-04-03 Thread Heiko Stübner
Am Montag, 3. April 2017, 13:07:58 CEST schrieb Joerg Roedel: > Hey Heiko, > > On Mon, Apr 03, 2017 at 11:56:59AM +0200, Heiko Stübner wrote: > > In general works, and I still keep a working iommu-based display :-) > > I can also see my two vop iommus under /sys/class/iommu now. > > Great, thanks

Re: [PATCH] iommu/rockchip: Make use of 'struct iommu_device'

2017-04-03 Thread Joerg Roedel
On Mon, Apr 03, 2017 at 01:11:01PM +0200, Heiko Stübner wrote: > ok, so you can at least add my > Tested-by: Heiko Stuebner > > on the patch Added and applied, thanks. ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundati

Re: [RFC PATCH 04/30] iommu/arm-smmu-v3: Add support for PCI ATS

2017-04-03 Thread Sunil Kovvuri
On Mon, Apr 3, 2017 at 3:44 PM, Jean-Philippe Brucker wrote: > On 03/04/17 09:34, Sunil Kovvuri wrote: >>> +static size_t arm_smmu_atc_invalidate_domain(struct arm_smmu_domain >>> *smmu_domain, >>> +unsigned long iova, size_t >>> size) >>> +{ >>> +

Re: [RFC PATCH 04/30] iommu/arm-smmu-v3: Add support for PCI ATS

2017-04-03 Thread Jean-Philippe Brucker
On 03/04/17 12:42, Sunil Kovvuri wrote: > On Mon, Apr 3, 2017 at 3:44 PM, Jean-Philippe Brucker > wrote: >> On 03/04/17 09:34, Sunil Kovvuri wrote: +static size_t arm_smmu_atc_invalidate_domain(struct arm_smmu_domain *smmu_domain, +unsign

[PATCH] iommu/io-pgtable-arm: Avoid shift overflow in block size

2017-04-03 Thread Robin Murphy
The recursive nature of __arm_lpae_{map,unmap}() means that ARM_LPAE_BLOCK_SIZE() is evaluated for every level, including those where block mappings aren't possible. This in itself is harmless enough, as we will only ever be called with valid sizes from the pgsize_bitmap, and thus always recurse do

[PATCH v4 1/2] PCI: Add device flag PCI_DEV_FLAGS_BRIDGE_XLATE_ROOT

2017-04-03 Thread Jayachandran C
Add a new quirk flag PCI_DEV_FLAGS_BRIDGE_XLATE_ROOT to limit the DMA alias search to go no further than the bridge where the IOMMU unit is attached. The flag will be used to indicate a bridge device which forwards the address translation requests to the IOMMU, i.e where the interrupt and DMA requ

[PATCH v4 0/2] Handle Cavium ThunderX2 PCI topology quirk

2017-04-03 Thread Jayachandran C
Hi Bjorn, Alex, Sending this again (with a trivial fix to author name), please review. Updated summary below: Here is v4 of the patchset to handle the PCIe topology quirk of Cavium ThunderX2 systems (previously known as Broadcom Vulcan). The earlier discussions on this can be seen at: http://www

[PATCH v4 2/2] PCI: quirks: Fix ThunderX2 dma alias handling

2017-04-03 Thread Jayachandran C
The Cavium ThunderX2 arm64 SoCs (called Broadcom Vulcan earlier), the PCI topology is slightly unusual. For a multi-node system, it looks like: [node level PCI bridges - one per node] [SoC PCI devices with MSI-X but no IOMMU] [PCI-PCIe "glue" bridges - upto 14, one per real port below]

Re: [v10, 7/7] mmc: sdhci-of-esdhc: fix host version for T4240-R1.0-R2.0

2017-04-03 Thread Kiran Kumar
Sorry to post in this huge email bunch. I have most probably hit an errata in Freescale T4240 for PPC_DISABLE_THREADS. I'm using Rev2 - T4240. Is this Errata required to be taken care or not? Any quick help is appreciated! My issue: I'm running line rate of Traffic to T4240 [10G of traffic on ea

Re: [PATCH v4 1/2] PCI: Add device flag PCI_DEV_FLAGS_BRIDGE_XLATE_ROOT

2017-04-03 Thread Robin Murphy
On 03/04/17 14:15, Jayachandran C wrote: > Add a new quirk flag PCI_DEV_FLAGS_BRIDGE_XLATE_ROOT to limit the DMA > alias search to go no further than the bridge where the IOMMU unit is > attached. > > The flag will be used to indicate a bridge device which forwards the > address translation reques

Re: [PATCH v4 2/2] PCI: quirks: Fix ThunderX2 dma alias handling

2017-04-03 Thread Robin Murphy
On 03/04/17 14:15, Jayachandran C wrote: > The Cavium ThunderX2 arm64 SoCs (called Broadcom Vulcan earlier), the PCI > topology is slightly unusual. For a multi-node system, it looks like: > > [node level PCI bridges - one per node] > [SoC PCI devices with MSI-X but no IOMMU] > [PCI-PCIe "

Re: [PATCH 0/5] iommu/omap: Add support for iommu-groups and 'struct iommu_device'

2017-04-03 Thread Suman Anna
Hi Joerg, On 03/31/2017 07:10 AM, Joerg Roedel wrote: > Hi, > > here is a small patch-set for the omap-iommu driver to make > it use new features of the iommu-core. Please review. Thanks for the patches - this has been on my TODO list but you beat me in getting there first :). Are these for 4.12

Re: [PATCH 1/5] iommu/omap: Move data structures to omap-iommu.h

2017-04-03 Thread Suman Anna
On 03/31/2017 07:10 AM, Joerg Roedel wrote: > From: Joerg Roedel > > The internal data-structures are scattered over various > header and C files. Consolidate them in omap-iommu.h. > > Signed-off-by: Joerg Roedel > --- > drivers/iommu/omap-iommu.c | 16 > drivers

Re: [PATCH V3 0/5] iommu/arm-smmu: Add runtime pm/sleep support

2017-04-03 Thread Will Deacon
On Fri, Mar 31, 2017 at 10:58:16PM -0400, Rob Clark wrote: > On Fri, Mar 31, 2017 at 1:54 PM, Will Deacon wrote: > > On Thu, Mar 09, 2017 at 09:05:43PM +0530, Sricharan R wrote: > >> This series provides the support for turning on the arm-smmu's > >> clocks/power domains using runtime pm. This is

Re: [PATCH] iommu/arm-smmu: Fix 16bit ASID configuration

2017-04-03 Thread Sunil Kovvuri
On Tue, Mar 28, 2017 at 4:11 PM, wrote: > From: Sunil Goutham > > 16bit ASID should be enabled before initializing TTBR0/1, > otherwise only LSB 8bit ASID will be considered. Hence > moving configuration of TTBCR register ahead of TTBR0/1 > while initializing context bank. > > Signed-off-by: Sun

Re: [PATCH] iommu/arm-smmu: Fix 16bit ASID configuration

2017-04-03 Thread Will Deacon
On Mon, Apr 03, 2017 at 11:16:33PM +0530, Sunil Kovvuri wrote: > On Tue, Mar 28, 2017 at 4:11 PM, wrote: > > From: Sunil Goutham > > > > 16bit ASID should be enabled before initializing TTBR0/1, > > otherwise only LSB 8bit ASID will be considered. Hence > > moving configuration of TTBCR register

Re: [PATCH 3/5] iommu/omap: Set dev->archdata.iommu = NULL in omap_iommu_remove_device

2017-04-03 Thread Suman Anna
Hi Joerg, On 03/31/2017 07:10 AM, Joerg Roedel wrote: > From: Joerg Roedel > > Don't leave a stale pointer in case the device continues to > exist for some more time. > > Signed-off-by: Joerg Roedel > --- > drivers/iommu/omap-iommu.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/d

Re: [PATCH 2/5] iommu/omap: Permanently keep iommu_dev pointer in arch_data

2017-04-03 Thread Suman Anna
Hi Joerg, On 03/31/2017 07:10 AM, Joerg Roedel wrote: > From: Joerg Roedel > > Instead of finding the matching IOMMU for a device using > string comparision functions, keep the pointer to the > iommu_dev in arch_data permanently populated. > > Signed-off-by: Joerg Roedel > --- > drivers/iommu

Re: [PATCH V3 0/5] iommu/arm-smmu: Add runtime pm/sleep support

2017-04-03 Thread Sricharan R
Hi Will, On 4/3/2017 10:53 PM, Will Deacon wrote: On Fri, Mar 31, 2017 at 10:58:16PM -0400, Rob Clark wrote: On Fri, Mar 31, 2017 at 1:54 PM, Will Deacon wrote: On Thu, Mar 09, 2017 at 09:05:43PM +0530, Sricharan R wrote: This series provides the support for turning on the arm-smmu's clocks/