> -Original Message-
> From: iommu-boun...@lists.linux-foundation.org [mailto:iommu-
> boun...@lists.linux-foundation.org] On Behalf Of Jean-Philippe Brucker
> Sent: Tuesday, February 28, 2017 3:54 AM
> Cc: Shanker Donthineni ; k...@vger.kernel.org;
> Catalin Marinas ; Sinan Kaya
> ; Will
On Fri, Jan 27, 2017 at 3:14 PM, Magnus Damm wrote:
> iommu/ipmmu-vmsa: IPMMU slave device whitelist V2
>
> [PATCH/RFC v2 1/4] iommu/of: Skip IOMMU devices disabled in DT
> [PATCH/RFC v2 2/4] iommu/ipmmu-vmsa: Get rid of disabled device check
> [PATCH/RFC v2 3/4] iommu/ipmmu-vmsa: Check devices in
On Wed, Feb 22, 2017 at 05:39:44PM -0600, Bjorn Helgaas wrote:
> [+cc Joerg, iommu list]
>
> On Wed, Feb 22, 2017 at 03:44:53PM -0500, Sinan Kaya wrote:
> > On 2/22/2017 1:44 PM, Bjorn Helgaas wrote:
> > > There is no way for a driver to say "I only need this memory BAR and
> > > not the other one
Hi Yi,
On 06/03/17 08:20, Liu, Yi L wrote:
>
>
>> -Original Message-
>> From: iommu-boun...@lists.linux-foundation.org [mailto:iommu-
>> boun...@lists.linux-foundation.org] On Behalf Of Jean-Philippe Brucker
>> Sent: Tuesday, February 28, 2017 3:54 AM
>> Cc: Shanker Donthineni ; k...@vge
Hi Bjorn,
On 03/03/17 21:09, Bjorn Helgaas wrote:
> On Mon, Feb 27, 2017 at 07:54:14PM +, Jean-Philippe Brucker wrote:
>> Currently ATS helpers like pci_enable_ats are only defined when CONFIG_PCI
>> is enabled. The ARM SMMU driver might get built with CONFIG_PCI disabled.
>> It would thus hav
On Fri, Mar 03, 2017 at 03:11:40PM -0600, Bjorn Helgaas wrote:
> On Mon, Feb 27, 2017 at 07:54:29PM +, Jean-Philippe Brucker wrote:
> > The PASID ECN to the PCIe spec added a bit in the PRI status register that
> > allows a Function to declare whether a PRG Response should contain the
> > PASID
The ARM SMMU detection especially depends from system firmware. For
better diagnostic, log the detected type in dmesg.
The smmu type's name is now stored in struct arm_smmu_type and ACPI
code is modified to use that struct too. Rename ARM_SMMU_MATCH_DATA()
macro to ARM_SMMU_TYPE() for better reada
On 2/25/2017 11:10 AM, Borislav Petkov wrote:
On Thu, Feb 16, 2017 at 09:46:04AM -0600, Tom Lendacky wrote:
Since DMA addresses will effectively look like 48-bit addresses when the
memory encryption mask is set, SWIOTLB is needed if the DMA mask of the
device performing the DMA does not support
On 3/1/2017 3:25 AM, Dave Young wrote:
Hi Tom,
Hi Dave,
On 02/17/17 at 10:43am, Tom Lendacky wrote:
On 2/17/2017 9:57 AM, Konrad Rzeszutek Wilk wrote:
On Thu, Feb 16, 2017 at 09:47:55AM -0600, Tom Lendacky wrote:
Provide support so that kexec can be used to boot a kernel when SME is
enabl
+kexec-list
On 3/6/2017 11:58 AM, Tom Lendacky wrote:
On 3/1/2017 3:25 AM, Dave Young wrote:
Hi Tom,
Hi Dave,
On 02/17/17 at 10:43am, Tom Lendacky wrote:
On 2/17/2017 9:57 AM, Konrad Rzeszutek Wilk wrote:
On Thu, Feb 16, 2017 at 09:47:55AM -0600, Tom Lendacky wrote:
Provide support so t
On 06/03/17 13:58, Robert Richter wrote:
> The ARM SMMU detection especially depends from system firmware. For
> better diagnostic, log the detected type in dmesg.
This paragraph especially depends from grammar. I think.
> The smmu type's name is now stored in struct arm_smmu_type and ACPI
> code
iommu/ipmmu-vmsa: IPMMU multi-arch update V7
[PATCH v7 01/07] iommu/ipmmu-vmsa: Remove platform data handling
[PATCH v7 02/07] iommu/ipmmu-vmsa: Rework interrupt code and use bitmap for
context
[PATCH v7 03/07] iommu/ipmmu-vmsa: Break out utlb parsing code
[PATCH v7 04/07] iommu/ipmmu-vmsa: Break
From: Magnus Damm
The IPMMU driver is using DT these days, and platform data is no longer
used by the driver. Remove unused code.
Signed-off-by: Magnus Damm
Reviewed-by: Laurent Pinchart
Reviewed-by: Joerg Roedel
---
Changes since V6:
- None
drivers/iommu/ipmmu-vmsa.c |5 -
1 fil
From: Magnus Damm
Break out the utlb parsing code and dev_data allocation into a
separate function. This is preparation for future code sharing.
Signed-off-by: Magnus Damm
Reviewed-by: Joerg Roedel
---
Changes since V6:
- None
drivers/iommu/ipmmu-vmsa.c | 58 -
From: Magnus Damm
Introduce a bitmap for context handing and convert the
interrupt routine to handle all registered contexts.
At this point the number of contexts are still limited.
Also remove the use of the ARM specific mapping variable
from ipmmu_irq() to allow compile on ARM64.
Signed-off-
From: Magnus Damm
Break out the domain allocation code into a separate function.
This is preparation for future code sharing.
Signed-off-by: Magnus Damm
Reviewed-by: Joerg Roedel
---
Changes since V6:
- None
drivers/iommu/ipmmu-vmsa.c | 13 +
1 file changed, 9 insertions(+),
From: Magnus Damm
Not all architectures have an iommu member in their archdata, so
use #ifdefs support build with COMPILE_TEST on any architecture.
Signed-off-by: Magnus Damm
Reviewed-by: Joerg Roedel
---
Changes since V6:
- Updated patch to handle newly introduced functions in:
[PATCH v7
From: Magnus Damm
Neither the ARM page table code enabled by IOMMU_IO_PGTABLE_LPAE
nor the IPMMU_VMSA driver actually depends on ARM_LPAE, so get
rid of the dependency.
Tested with ipmmu-vmsa on r8a7794 ALT and a kernel config using:
# CONFIG_ARM_LPAE is not set
Signed-off-by: Magnus Damm
Ack
From: Magnus Damm
Introduce an alternative set of iommu_ops suitable for 64-bit ARM
as well as 32-bit ARM when CONFIG_IOMMU_DMA=y. Also adjust the
Kconfig to depend on ARM or IOMMU_DMA. Initialize the device
from ->xlate() when CONFIG_IOMMU_DMA=y.
Signed-off-by: Magnus Damm
---
Changes since
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