Boris,
On 1/13/17 00:52, Borislav Petkov wrote:
On Mon, Jan 09, 2017 at 09:33:47PM -0600, Suravee Suthikulpanit wrote:
This patch adds multi-IOMMU support for perf by exposing
an AMD IOMMU PMU for each IOMMU found in the system via:
/sys/device/amd_iommu_x /* where x is the IOMMU index.
On 12.01.2017 07:41, Tomasz Nowicki wrote:
On 11.01.2017 13:19, Robin Murphy wrote:
On 11/01/17 11:51, Tomasz Nowicki wrote:
The goal of erratum #27704 workaround was to make sure that ASIDs and
VMIDs
are unique across all SMMU instances on affected Cavium systems.
Currently, the workaround co
On 13/01/17 10:43, Tomasz Nowicki wrote:
> On 12.01.2017 07:41, Tomasz Nowicki wrote:
>> On 11.01.2017 13:19, Robin Murphy wrote:
>>> On 11/01/17 11:51, Tomasz Nowicki wrote:
The goal of erratum #27704 workaround was to make sure that ASIDs and
VMIDs
are unique across all SMMU instan
Add support for DMA_ATTR_FORCE_CONTIGUOUS to the generic IOMMU DMA code.
This allows to allocate physically contiguous DMA buffers on arm64
systems with an IOMMU.
Note that as this uses the CMA allocator, setting this attribute has a
runtime-dependency on CONFIG_DMA_CMA, just like on arm32.
For a
On 13/01/17 11:07, Geert Uytterhoeven wrote:
> Add support for DMA_ATTR_FORCE_CONTIGUOUS to the generic IOMMU DMA code.
> This allows to allocate physically contiguous DMA buffers on arm64
> systems with an IOMMU.
Can anyone explain what this attribute is actually used for? I've never
quite figure
On Fri, Jan 13, 2017 at 05:24:01PM +0700, Suravee Suthikulpanit wrote:
> IIUC, Perf tools looks at the /sys/devices/x to identify
> availalble PMUs. Are you planning to have perf tools look at
> /sys/devices/system/iommu/xxx instead?
No, I'm planning to understand what do you mean exactly. Bec
Hi Robin,
On Fri, Jan 13, 2017 at 12:32 PM, Robin Murphy wrote:
> On 13/01/17 11:07, Geert Uytterhoeven wrote:
>> Add support for DMA_ATTR_FORCE_CONTIGUOUS to the generic IOMMU DMA code.
>> This allows to allocate physically contiguous DMA buffers on arm64
>> systems with an IOMMU.
>
> Can anyone
On 13/01/17 11:59, Geert Uytterhoeven wrote:
> Hi Robin,
>
> On Fri, Jan 13, 2017 at 12:32 PM, Robin Murphy wrote:
>> On 13/01/17 11:07, Geert Uytterhoeven wrote:
>>> Add support for DMA_ATTR_FORCE_CONTIGUOUS to the generic IOMMU DMA code.
>>> This allows to allocate physically contiguous DMA buf
Hi Robin,
On Fri, Jan 13, 2017 at 1:17 PM, Robin Murphy wrote:
> On 13/01/17 11:59, Geert Uytterhoeven wrote:
>> On Fri, Jan 13, 2017 at 12:32 PM, Robin Murphy wrote:
>>> On 13/01/17 11:07, Geert Uytterhoeven wrote:
Add support for DMA_ATTR_FORCE_CONTIGUOUS to the generic IOMMU DMA code.
>>
Hello Eric,
On 11.01.2017 10:41, Eric Auger wrote:
Following LPC discussions, we now report reserved regions through
the iommu-group sysfs reserved_regions attribute file.
Reserved regions are populated through the IOMMU get_resv_region
callback (former get_dm_regions), now implemented by amd-i
On 04/07/16 10:00, Matthias Brugger wrote:
On 04/07/16 03:32, Honghui Zhang wrote:
On Sun, 2016-07-03 at 21:12 +0200, Matthias Brugger wrote:
On 07/03/2016 08:24 AM, Matthias Brugger wrote:
On 06/08/2016 11:51 AM, honghui.zh...@mediatek.com wrote:
From: Honghui Zhang
Add the dtsi nod
On Wed, 11 Jan 2017 09:41:53 +
Eric Auger wrote:
> In case the IOMMU translates MSI transactions (typical case
> on ARM), we check MSI remapping capability at IRQ domain
> level. Otherwise it is checked at IOMMU level.
>
> At this stage the arm-smmu-(v3) still advertise the
> IOMMU_CAP_INTR_
On Wed, 11 Jan 2017 09:41:52 +
Eric Auger wrote:
> When attaching a group to the container, check the group's
> reserved regions and test whether the IOMMU translates MSI
> transactions. If yes, we initialize an IOVA allocator through
> the iommu_get_msi_cookie API. This will allow the MSI IO
On 1/13/17 18:49, Borislav Petkov wrote:
On Fri, Jan 13, 2017 at 05:24:01PM +0700, Suravee Suthikulpanit wrote:
IIUC, Perf tools looks at the /sys/devices/x to identify
availalble PMUs. Are you planning to have perf tools look at
/sys/devices/system/iommu/xxx instead?
No, I'm planning to
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