On Mon, Jan 09, 2017 at 09:33:44PM -0600, Suravee Suthikulpanit wrote:
> This patch declare pr_fmt for perf/amd_iommu and remove unnecessary
There's that "This patch" again.
> pr_debug.
>
> Cc: Peter Zijlstra
> Cc: Borislav Petkov
> Signed-off-by: Suravee Suthikulpanit
> ---
> arch/x86/event
On Mon, Jan 09, 2017 at 09:33:45PM -0600, Suravee Suthikulpanit wrote:
> This patch cleans up:
> * Various bitwise operations in perf_iommu_enable_event
> * Make use macros BIT(x)
>
> This should not affect logic and functionality.
>
> Cc: Peter Zijlstra
> Cc: Borislav Petkov
> Signed-off-b
On Mon, Jan 09, 2017 at 09:33:46PM -0600, Suravee Suthikulpanit wrote:
> This patch introduces amd_iommu_get_num_iommus(). This is intended for
There's that "This patch" again... but you get the idea :)
> Perf AMD IOMMU driver.
>
> Cc: Joerg Roedel
> Signed-off-by: Suravee Suthikulpanit
> ---
On Wed, Jan 11, 2017 at 03:59:30PM -0500, Rob Clark wrote:
> On Wed, Jan 11, 2017 at 4:36 AM, Will Deacon wrote:
> > On Tue, Jan 10, 2017 at 02:20:13PM -0500, Rob Clark wrote:
> >> On Tue, Jan 10, 2017 at 12:52 PM, Will Deacon wrote:
> >> > On Fri, Jan 06, 2017 at 11:26:49AM -0500, Rob Clark wrot
On Tue, Jan 10, 2017 at 02:47:13PM -0500, Nate Watterson wrote:
> In the current arm-smmu-v3 driver, all smmus that support 2-level
> stream tables are being forced to use them. This is suboptimal for
> smmus that support fewer stream id bits than would fill in a single
> second level table. This p
On Mon, Jan 09, 2017 at 09:33:47PM -0600, Suravee Suthikulpanit wrote:
> This patch adds multi-IOMMU support for perf by exposing
> an AMD IOMMU PMU for each IOMMU found in the system via:
>
> /sys/device/amd_iommu_x /* where x is the IOMMU index. */
Straight into the top-level devices hier
