Hi Lorenzo,
>With the introduction of the new iommu_{register/get}_instance()
>interface in commit e4f10ffe4c9b ("iommu: Make of_iommu_set/get_ops() DT
>agnostic") (based on struct fwnode_handle as look-up token, so firmware
>agnostic) to register IOMMU instances with the core IOMMU layer there is
Following LPC discussions, we now report reserved regions through
iommu-group sysfs reserved_regions attribute file.
Reserved regions are populated through the IOMMU get_resv_region
callback (former get_dm_regions), now implemented by amd-iommu,
intel-iommu and arm-smmu:
- the intel-iommu reports
IOMMU domain users such as VFIO face a similar problem to DMA API ops
with regard to mapping MSI messages in systems where the MSI write is
subject to IOMMU translation. With the relevant infrastructure now in
place for managed DMA domains, it's actually really simple for other
users to piggyback o
We want to extend the callbacks used for dm regions and
use them for reserved regions. Reserved regions can be
- directly mapped regions
- regions that cannot be iommu mapped (PCI host bridge windows, ...)
- MSI regions (because they belong to another address space or because
they are not transla
We introduce a new field to differentiate the reserved region
types and specialize the apply_resv_region implementation.
Legacy direct mapped regions have IOMMU_RESV_DIRECT type.
We introduce 2 new reserved memory types:
- IOMMU_RESV_MSI will characterize MSI regions
- IOMMU_RESV_NOMAP characteriz
Introduce a new helper serving the purpose to allocate a reserved
region. This will be used in iommu driver implementing reserved
region callbacks.
Signed-off-by: Eric Auger
---
v3 -> v4:
- add INIT_LIST_HEAD(®ion->list)
- use int for prot param and add int type param
- remove implementation ou
As we introduced new reserved region types which do not require
mapping, let's make sure we only map direct mapped regions.
Signed-off-by: Eric Auger
---
v3 -> v4:
- use region's type and reword commit message and title
---
drivers/iommu/iommu.c | 3 +++
1 file changed, 3 insertions(+)
diff -
A new iommu-group sysfs attribute file is introduced. It contains
the list of reserved regions for the iommu-group. Each reserved
region is described on a separate line:
- first field is the start IOVA address,
- second is the end IOVA address,
Signed-off-by: Eric Auger
---
v3 -> v4:
- add cast
This patch registers the [FEE0_h - FEF0_000h] 1MB MSI range
as a reserved region. This will allow to report that range
in the iommu-group sysfs.
Signed-off-by: Eric Auger
---
RFCv2 -> RFCv3:
- use get/put_resv_region callbacks.
RFC v1 -> RFC v2:
- fix intel_iommu_add_reserved_regions name
Introduce iommu_get_group_resv_regions whose role consists in
enumerating all devices from the group and collecting their
reserved regions. The list is sorted and overlaps are checked.
Signed-off-by: Eric Auger
---
v3 -> v4:
- take the iommu_group lock in iommu_get_group_resv_regions
- the list
This new enum value aims at indicating whether the irq domain
implements MSI remapping. This property is useful to assess
the IRQ assignment safety at VFIO level.
Signed-off-by: Eric Auger
---
---
include/linux/irqdomain.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/linux/irq
The get() populates the list with the MSI IOVA reserved window.
At the moment an arbitray MSI IOVA window is set at 0x800
of size 1MB. This will allow to report those info in iommu-group
sysfs.
Signed-off-by: Eric Auger
---
v3 -> v4:
- do not handle PCI host bridge windows anymore
- encode
The GICv3 ITS is MSI remapping capable. Let's advertise
this property so that VFIO passthrough can assess IRQ safety.
Signed-off-by: Eric Auger
---
drivers/irqchip/irq-gic-v3-its.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-i
iommu/arm-smmu: Implement reserved region get/put callbacks
The get() populates the list with the MSI IOVA reserved window.
At the moment an arbitray MSI IOVA window is set at 0x800
of size 1MB. This will allow to report those info in iommu-group
sysfs.
Signed-off-by: Eric Auger
---
v4: c
Hi,
>-Original Message-
>From: linux-arm-msm-ow...@vger.kernel.org
>[mailto:linux-arm-msm-ow...@vger.kernel.org] On Behalf Of Jordan Crouse
>Sent: Wednesday, January 04, 2017 3:59 AM
>To: Rob Clark
>Cc: Will Deacon ; iommu@lists.linux-foundation.org;
>linux-arm-...@vger.kernel.org; Sric
This patch registers the MSI and HT regions as non mappable
reserved regions. They will be exposed in the iommu-group sysfs.
For direct-mapped regions let's also use iommu_alloc_resv_region().
Signed-off-by: Eric Auger
---
v5: creation
---
drivers/iommu/amd_iommu.c | 37 ++
This new function checks whether all platform and PCI
MSI domains implement IRQ remapping. This is useful to
understand whether VFIO passthrough is safe with respect
to interrupts.
On ARM typically an MSI controller can sit downstream
to the IOMMU without preventing VFIO passthrough.
As such any a
IOMMU_CAP_INTR_REMAP has been advertised in arm-smmu(-v3) although
on ARM this property is not attached to the IOMMU but rather is
implemented in the MSI controller (GICv3 ITS).
Now vfio_iommu_type1 takes into account the MSI domain MSI remapping
capability, let's correct this.
Signed-off-by: Eri
In case the IOMMU does not bypass MSI transactions (typical
case on ARM), we check all MSI controllers are IRQ remapping
capable. If not the IRQ assignment may be unsafe.
At this stage the arm-smmu-(v3) still advertise the
IOMMU_CAP_INTR_REMAP capability at IOMMU level. This will be
removed in sub
When attaching a group to the container, check the group's
reserved regions and test whether the IOMMU translates MSI
transactions. If yes, we initialize an IOVA allocator through
the iommu_get_msi_cookie API. This will allow the MSI IOVAs
to be transparently allocated on MSI controller's compose()
Hi Eric,
On 04/01/17 13:32, Eric Auger wrote:
> This new function checks whether all platform and PCI
> MSI domains implement IRQ remapping. This is useful to
> understand whether VFIO passthrough is safe with respect
> to interrupts.
>
> On ARM typically an MSI controller can sit downstream
> to
Hi Marc,
On 04/01/2017 14:46, Marc Zyngier wrote:
> Hi Eric,
>
> On 04/01/17 13:32, Eric Auger wrote:
>> This new function checks whether all platform and PCI
>> MSI domains implement IRQ remapping. This is useful to
>> understand whether VFIO passthrough is safe with respect
>> to interrupts.
>>
On Mon, Dec 05, 2016 at 08:09:07PM +0800, Xunlei Pang wrote:
> v2->v3:
> Flush context cache only and add Fixes-tag, according to Joerg's comments.
>
> drivers/iommu/intel-iommu.c | 19 +++
> 1 file changed, 19 insertions(+)
Applied to the fixes branch, thanks.
On Tue, Dec 06, 2016 at 10:14:23AM -0800, Jacob Pan wrote:
> drivers/iommu/intel-iommu.c | 23 ++-
> 1 file changed, 22 insertions(+), 1 deletion(-)
Applied to the fixes branch, thanks.
___
iommu mailing list
iommu@lists.linux-found
On Mon, Dec 12, 2016 at 07:28:26AM -0500, Huang Rui wrote:
> The generic command buffer entry is 128 bits (16 bytes), so the offset
> of tail and head pointer should be 16 bytes aligned and increased with
> 0x10 per command.
>
> When cmd buf is full, head = (tail + 0x10) % CMD_BUFFER_SIZE.
>
> So
On Wed, Jan 4, 2017 at 8:33 AM, Sricharan wrote:
> Hi,
>
>>-Original Message-
>>From: linux-arm-msm-ow...@vger.kernel.org
>>[mailto:linux-arm-msm-ow...@vger.kernel.org] On Behalf Of Jordan Crouse
>>Sent: Wednesday, January 04, 2017 3:59 AM
>>To: Rob Clark
>>Cc: Will Deacon ; iommu@lists.
On Mon, Dec 19, 2016 at 10:46:58PM +0800, Geliang Tang wrote:
> To make the code clearer, use rb_entry() instead of container_of() to
> deal with rbtree.
>
> Signed-off-by: Geliang Tang
> ---
> drivers/iommu/iova.c | 23 +++
> 1 file changed, 11 insertions(+), 12 deletions(-)
On Tue, Dec 27, 2016 at 07:21:39PM -0800, Raj, Ashok wrote:
> This sounds reasonable, if we can reserve from the host bridge apertures
> it should take care of hot-plug cases as well, and should simply how the
> reservation is made.
Agreed, I have this on my todo list already since I converted th
On Fri, Dec 23, 2016 at 08:38:45PM +0700, Suravee Suthikulpanit wrote:
> --- a/arch/x86/events/amd/iommu.h
> +++ b/arch/x86/events/amd/iommu.h
> @@ -24,15 +24,12 @@
> #define PC_MAX_SPEC_BNKS 64
> #define PC_MAX_SPEC_CNTRS16
>
> -/* iommu pc reg masks*/
>
[+Yong Wu for mtk_iommu]
On 03/01/17 17:34, Lorenzo Pieralisi wrote:
> With the introduction of the new iommu_{register/get}_instance()
> interface in commit e4f10ffe4c9b ("iommu: Make of_iommu_set/get_ops() DT
> agnostic") (based on struct fwnode_handle as look-up token, so firmware
> agnostic) t
On Tue, Jan 03, 2017 at 05:34:56PM +, Lorenzo Pieralisi wrote:
> With the introduction of the new iommu_{register/get}_instance()
> interface in commit e4f10ffe4c9b ("iommu: Make of_iommu_set/get_ops() DT
> agnostic") (based on struct fwnode_handle as look-up token, so firmware
> agnostic) to r
On 04/01/17 14:11, Auger Eric wrote:
> Hi Marc,
>
> On 04/01/2017 14:46, Marc Zyngier wrote:
>> Hi Eric,
>>
>> On 04/01/17 13:32, Eric Auger wrote:
>>> This new function checks whether all platform and PCI
>>> MSI domains implement IRQ remapping. This is useful to
>>> understand whether VFIO passt
Hi Marc,
On 04/01/2017 16:27, Marc Zyngier wrote:
> On 04/01/17 14:11, Auger Eric wrote:
>> Hi Marc,
>>
>> On 04/01/2017 14:46, Marc Zyngier wrote:
>>> Hi Eric,
>>>
>>> On 04/01/17 13:32, Eric Auger wrote:
This new function checks whether all platform and PCI
MSI domains implement IRQ re
On Wed, Jan 4, 2017 at 9:31 AM, Rob Clark wrote:
> On Wed, Jan 4, 2017 at 8:33 AM, Sricharan wrote:
>> Hi,
>>
>>>-Original Message-
>>>From: linux-arm-msm-ow...@vger.kernel.org
>>>[mailto:linux-arm-msm-ow...@vger.kernel.org] On Behalf Of Jordan Crouse
>>>Sent: Wednesday, January 04, 2017
On Mon, Jan 02, 2017 at 06:42:41PM +0530, Sricharan R wrote:
> The newly added DMA_ATTR_PRIVILEGED is useful for creating mappings that
> are only accessible to privileged DMA engines. Adding it to the
> arm dma-mapping.c so that the ARM32 DMA IOMMU mapper can make use of it.
>
> Signed-off-by: S
From: Rafael J. Wysocki
Linus reported that commit 174cc7187e6f "ACPICA: Tables: Back port
acpi_get_table_with_size() and early_acpi_os_unmap_memory() from
Linux kernel" added a new warning on his desktop system:
ACPI Warning: Table 9fe6c0a0, Validation count is zero before decrement
w
Hi Eric,
[auto build test ERROR on linus/master]
[also build test ERROR on v4.10-rc2 next-20170105]
[cannot apply to iommu/next]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Eric-Auger/KVM-PCI
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