On Wed, Jan 15, 2014 at 09:03:05PM -0700, Alex Williamson wrote:
> [cc +Neil]
>
> On Tue, 2014-01-14 at 12:41 -0500, Anthony DeRobertis wrote:
> > I repeatedly get "No irq handler for vector" since upgrading to 3.12. I
> > have confirmed it happens in git master as of yesterday morning
> > (061f
Cc: Rob Herring
Cc: Andreas Herrmann
Signed-off-by: Andreas Herrmann
---
arch/arm/boot/dts/ecx-2000.dts| 44 +++--
arch/arm/boot/dts/ecx-common.dtsi |9 +---
2 files changed, 48 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/ecx-2000.
Introduce handling of driver options. Options are set based on DT
information when probing an SMMU device. The first option introduced
is "arm,smmu-isolate-devices". (It will be used in the bus notifier
block.)
Cc: Andreas Herrmann
Signed-off-by: Andreas Herrmann
---
drivers/iommu/arm-smmu.c |
At the moment just handle BUS_NOTIFY_BIND_DRIVER to conditionally
isolate all master devices for an SMMU.
Depending on DT information each device is put into its own protection
domain (if possible). For configuration with one or just a few
masters per SMMU that is easy to achieve.
In case of man
The DT parsing code that determines stream IDs uses
of_parse_phandle_with_args and thus MAX_MASTER_STREAMIDS
is always bound by MAX_PHANDLE_ARGS.
Cc: Andreas Herrmann
Signed-off-by: Andreas Herrmann
---
drivers/iommu/arm-smmu.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --gi
In such a case we have to use secure aliases of some non-secure
registers.
This handling is switched on by DT property
"calxeda,smmu-secure-config-access" for an SMMU node.
Cc: Andreas Herrmann
Signed-off-by: Andreas Herrmann
---
drivers/iommu/arm-smmu.c | 31 +--
arm-smmu driver uses of_parse_phandle_with_args when parsing DT
information to determine stream IDs for a master device.
Thus the number of stream IDs per master device is bound by
MAX_PHANDLE_ARGS.
To support Calxeda ECX-2000 hardware arm-smmu driver requires a
slightly higher value for MAX_PHAND
Hi,
Here is v4 of arm-smmu changes to support SMMUs on Calxeda ECX-2000.
Patches are based on v3.13-rc8.
Major change to previous version is new code that allows to extend an
existing IOMMU address mapping. (last two patches)
Changelog:
v4:
- added support to extend the size of an IOMMU addres
Cc: Andreas Herrmann
Signed-off-by: Andreas Herrmann
---
drivers/iommu/arm-smmu.c | 25 ++---
1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 02a871e..a4e0c93 100644
--- a/drivers/iommu/arm-smmu.c
+++
This patch adds descriptions fore new properties of device tree
binding for the ARM SMMU architecture. These properties control
arm-smmu driver options.
Cc: Rob Herring
Cc: Grant Likely
Cc: Will Deacon
Cc: Andreas Herrmann
Signed-off-by: Andreas Herrmann
---
.../devicetree/bindings/iommu/arm
The new parameters are
dma_addr_t grow_size
Specifies the size by which the mapping will be extended in
case that no sufficient space is left in the mapping to
handle an iova allocation request. If a grow_size of 0 is
specified the mapping is not extended.
Try to determine a mask that can be used for all StreamIDs of a master
device. This allows to use just one SMR group instead of
number-of-streamids SMR groups for a master device.
Changelog:
* dropped "#define DEBUG"
* removed "BUG_ON(!is_power_of_2(nr))" from determine_smr_mask
by passing an o
Instead of using just one bitmap to keep track of IO virtual addresses
(handed out for IOMMU use) introduce a list of iova_ranges (each
having its own bitmap). This allows us to extend existing mappings
when running out of iova space for a mapping.
If there is not enough space in the mapping to se
Hello,
On 2014-01-14 15:13, Akinobu Mita wrote:
This adds support for the DMA Contiguous Memory Allocator for intel-iommu.
This change enables dma_alloc_coherent() to allocate big contiguous
memory.
It is achieved in the same way as nommu_dma_ops currently does, i.e.
trying to allocate memory b
On Thu, Jan 16, 2014 at 6:44 AM, Andreas Herrmann
wrote:
> Cc: Rob Herring
> Cc: Andreas Herrmann
> Signed-off-by: Andreas Herrmann
One minor comment, but otherwise:
Acked-by: Rob Herring
> ---
> arch/arm/boot/dts/ecx-2000.dts| 44
> +++--
> arch/arm/
On Thu, Jan 16, 2014 at 6:44 AM, Andreas Herrmann
wrote:
> arm-smmu driver uses of_parse_phandle_with_args when parsing DT
> information to determine stream IDs for a master device.
> Thus the number of stream IDs per master device is bound by
> MAX_PHANDLE_ARGS.
>
> To support Calxeda ECX-2000 ha
On Thu, Jan 16, 2014 at 6:44 AM, Andreas Herrmann
wrote:
> This patch adds descriptions fore new properties of device tree
> binding for the ARM SMMU architecture. These properties control
> arm-smmu driver options.
>
> Cc: Rob Herring
> Cc: Grant Likely
> Cc: Will Deacon
> Cc: Andreas Herrmann
I see the file names got lost in the list archive. To be clear:
The one that has
ACPI: DMAR bf7980c0 000140 (v01AMI OEMDMAR 0001 MSFT
0097)
is the one with VT-d on.
___
iommu mailing list
iommu@lists.linux-foundation.org
https:/
2014/1/16 Marek Szyprowski :
>> @@ -3019,17 +3019,31 @@ static void *intel_alloc_coherent(struct device
>> *hwdev, size_t size,
>> flags |= GFP_DMA32;
>> }
>> - vaddr = (void *)__get_free_pages(flags, order);
>> - if (!vaddr)
>> + if (!(flags & GFP_
2014/1/16 Konrad Rzeszutek Wilk :
> On Tue, Jan 14, 2014 at 11:13:47PM +0900, Akinobu Mita wrote:
>> The DMA Contiguous Memory Allocator support on x86 is disabled when
>> swiotlb config option is enabled. So DMA CMA is always disabled on
>> x86_64 because swiotlb is always enabled. This attempts
2014/1/16 Konrad Rzeszutek Wilk :
> On Tue, Jan 14, 2014 at 11:13:46PM +0900, Akinobu Mita wrote:
>> Calling dma_alloc_coherent() with __GFP_ZERO must return zeroed memory.
>>
>> But when the contiguous memory allocator (CMA) is enabled on x86 and
>> the memory region is allocated by dma_alloc_from
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