On 12/03/18 07:19, Jitendra Bhivare wrote:
On Tue, Mar 6, 2018 at 5:17 PM, Robin Murphy wrote:
On 06/03/18 04:59, Jitendra Bhivare wrote:
iPROC SoC has a special device window to treat GICv3 ITS MSI.
Ugh, really? After preferably printing out 100 copies of the SBSA, binding
them all togeth
On Tue, Mar 6, 2018 at 5:17 PM, Robin Murphy wrote:
> On 06/03/18 04:59, Jitendra Bhivare wrote:
>>
>> iPROC SoC has a special device window to treat GICv3 ITS MSI.
>
>
> Ugh, really? After preferably printing out 100 copies of the SBSA, binding
> them all together and dropping the lot onto the ha
On 06/03/18 04:59, Jitendra Bhivare wrote:
iPROC SoC has a special device window to treat GICv3 ITS MSI.
Ugh, really? After preferably printing out 100 copies of the SBSA,
binding them all together and dropping the lot onto the hardware
designers from a great height, could you clarify what ex
iPROC SoC has a special device window to treat GICv3 ITS MSI.
Current code maps MSI to IOVA space. Add SMMU node property to use
direct mappings for MSI region.
This property is read and reserved when arm_smmu_get_resv_regions
gets called.
Signed-off-by: Jitendra Bhivare
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Documentation/devi
