Re: [PATCH v6 01/10] iommu/vt-d: Enlightened PASID allocation

2019-10-24 Thread Lu Baolu
Hi, On 10/24/19 5:11 AM, Jacob Pan wrote: On Wed, 23 Oct 2019 10:55:23 -0700 Jacob Pan wrote: Do you have to check this everytime? every dmar_readq is going to trap to the other side ... Yes. We don't need to check it every time. Check once and save the result during boot is enough. How ab

Re: [PATCH v6 01/10] iommu/vt-d: Enlightened PASID allocation

2019-10-24 Thread Lu Baolu
Hi, On 10/24/19 1:55 AM, Jacob Pan wrote: On Wed, 23 Oct 2019 09:53:04 +0800 Lu Baolu wrote: Hi Ashok, Thanks for reviewing the patch. On 10/23/19 8:45 AM, Raj, Ashok wrote: On Tue, Oct 22, 2019 at 04:53:14PM -0700, Jacob Pan wrote: From: Lu Baolu If Intel IOMMU runs in caching mode, a.

Re: [PATCH v6 01/10] iommu/vt-d: Enlightened PASID allocation

2019-10-23 Thread Jacob Pan
On Wed, 23 Oct 2019 10:55:23 -0700 Jacob Pan wrote: > > > Do you have to check this everytime? every dmar_readq is going to > > > trap to the other side ... > > > > Yes. We don't need to check it every time. Check once and save the > > result during boot is enough. > > > > How about below i

Re: [PATCH v6 01/10] iommu/vt-d: Enlightened PASID allocation

2019-10-23 Thread Jacob Pan
On Wed, 23 Oct 2019 09:53:04 +0800 Lu Baolu wrote: > Hi Ashok, > > Thanks for reviewing the patch. > > On 10/23/19 8:45 AM, Raj, Ashok wrote: > > On Tue, Oct 22, 2019 at 04:53:14PM -0700, Jacob Pan wrote: > >> From: Lu Baolu > >> > >> If Intel IOMMU runs in caching mode, a.k.a. virtual IOMMU

Re: [PATCH v6 01/10] iommu/vt-d: Enlightened PASID allocation

2019-10-22 Thread Lu Baolu
Hi Ashok, Thanks for reviewing the patch. On 10/23/19 8:45 AM, Raj, Ashok wrote: On Tue, Oct 22, 2019 at 04:53:14PM -0700, Jacob Pan wrote: From: Lu Baolu If Intel IOMMU runs in caching mode, a.k.a. virtual IOMMU, the IOMMU driver should rely on the emulation software to allocate and free PA

Re: [PATCH v6 01/10] iommu/vt-d: Enlightened PASID allocation

2019-10-22 Thread Raj, Ashok
On Tue, Oct 22, 2019 at 04:53:14PM -0700, Jacob Pan wrote: > From: Lu Baolu > > If Intel IOMMU runs in caching mode, a.k.a. virtual IOMMU, the > IOMMU driver should rely on the emulation software to allocate > and free PASID IDs. The Intel vt-d spec revision 3.0 defines a > register set to suppor

[PATCH v6 01/10] iommu/vt-d: Enlightened PASID allocation

2019-10-22 Thread Jacob Pan
From: Lu Baolu If Intel IOMMU runs in caching mode, a.k.a. virtual IOMMU, the IOMMU driver should rely on the emulation software to allocate and free PASID IDs. The Intel vt-d spec revision 3.0 defines a register set to support this. This includes a capability register, a virtual command register