Re: [PATCH V4] IOMMU, AMD Family15h Model10-1Fh erratum 746 Workaround

2013-01-28 Thread Joerg Roedel
On Thu, Jan 24, 2013 at 01:17:53PM -0600, Suthikulpanit, Suravee wrote: > From: Suravee Suthikulpanit > Signed-off-by: Suravee Suthikulpanit > --- > Changelog: > v4: > * Fix style and spacing > > v3: > * Add proper commit message > * Change logic to avoid unnecessary indentaio

Re: [PATCH V4] IOMMU, AMD Family15h Model10-1Fh erratum 746 Workaround

2013-01-24 Thread Borislav Petkov
On Thu, Jan 24, 2013 at 01:17:53PM -0600, suravee.suthikulpa...@amd.com wrote: > From: Suravee Suthikulpanit > > The IOMMU may stop processing page translations due to a perceived lack > of credits for writing upstream peripheral page service request (PPR) > or event logs. If the L2B miscellaneou

[PATCH V4] IOMMU, AMD Family15h Model10-1Fh erratum 746 Workaround

2013-01-24 Thread suravee.suthikulpanit
From: Suravee Suthikulpanit The IOMMU may stop processing page translations due to a perceived lack of credits for writing upstream peripheral page service request (PPR) or event logs. If the L2B miscellaneous clock gating feature is enabled the IOMMU does not properly register credits after the