On 9/5/2018 3:34 PM, Rob Clark wrote:
On Wed, Sep 5, 2018 at 5:22 AM Vivek Gautam wrote:
On 8/14/2018 5:54 PM, Vivek Gautam wrote:
Hi Will,
On 8/14/2018 5:10 PM, Will Deacon wrote:
Hi Vivek,
On Tue, Aug 14, 2018 at 04:25:23PM +0530, Vivek Gautam wrote:
Qcom's implementation of arm,mmu
On Wed, Sep 5, 2018 at 5:22 AM Vivek Gautam wrote:
>
>
> On 8/14/2018 5:54 PM, Vivek Gautam wrote:
> > Hi Will,
> >
> >
> > On 8/14/2018 5:10 PM, Will Deacon wrote:
> >> Hi Vivek,
> >>
> >> On Tue, Aug 14, 2018 at 04:25:23PM +0530, Vivek Gautam wrote:
> >>> Qcom's implementation of arm,mmu-500 on
On 8/14/2018 5:54 PM, Vivek Gautam wrote:
Hi Will,
On 8/14/2018 5:10 PM, Will Deacon wrote:
Hi Vivek,
On Tue, Aug 14, 2018 at 04:25:23PM +0530, Vivek Gautam wrote:
Qcom's implementation of arm,mmu-500 on sdm845 has a
functional/performance
errata [1] because of which the TCU cache look up
Hi Will,
On 8/14/2018 5:10 PM, Will Deacon wrote:
Hi Vivek,
On Tue, Aug 14, 2018 at 04:25:23PM +0530, Vivek Gautam wrote:
Qcom's implementation of arm,mmu-500 on sdm845 has a functional/performance
errata [1] because of which the TCU cache look ups are stalled during
invalidation cycle. This
Hi Vivek,
On Tue, Aug 14, 2018 at 04:25:23PM +0530, Vivek Gautam wrote:
> Qcom's implementation of arm,mmu-500 on sdm845 has a functional/performance
> errata [1] because of which the TCU cache look ups are stalled during
> invalidation cycle. This is mitigated by serializing all the invalidation
Qcom's implementation of arm,mmu-500 on sdm845 has a functional/performance
errata [1] because of which the TCU cache look ups are stalled during
invalidation cycle. This is mitigated by serializing all the invalidation
requests coming to the smmu.
This patch series addresses this errata by adding
