Hi Christoph,
On 2018/5/16 2:05, Christoph Hellwig wrote:
> We now have error handling in map_single/map_page callers (most of them
> anyway). As swiotlb_tbl_map_single already prints a useful warning
> when running out of swiotlb pool swace we can also remove swiotlb_full
Hi Christoph,
On 2018/5/9 15:38, Christoph Hellwig wrote:
> Thanks,
>
> applied to the dma-mapping tree.
Thanks
BTW, should lib/swiotlb.c also add to DMA MAPPING HELPERS, or
add yourself as a maintainer of SWIOTLB SUBSYSTEM ? It will make
get_maintainer.pl get you :)
Thanks
Yisheng
>
> .
>
swiotlb use physical address of bounce buffer when do map and unmap,
therefore, related comment should be updated.
Signed-off-by: Yisheng Xie
---
lib/swiotlb.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/lib/swiotlb.c b/lib/swiotlb.c
index fece575..e3d9445 100644
Hi Robin,
Thanks for your comment!
On 2018/4/24 0:07, Robin Murphy wrote:
> On 23/04/18 12:45, Yisheng Xie wrote:
>> Add a bypass parameter in arm_smmu_device to keep whether smmu device
>> should pypass or not, so parameter bypass in arm_smmu_reset_device can
>> be removed
Hi Robin,
Thanks for your comment.
On 2018/4/24 0:14, Robin Murphy wrote:
> On 23/04/18 12:45, Yisheng Xie wrote:
>> When system suspend, hisilicon's smmu will do power gating for smmu,
>> this time smmu's reg will be set to default value for not having
>> hardw
Add a bypass parameter in arm_smmu_device to keep whether smmu device
should pypass or not, so parameter bypass in arm_smmu_reset_device can
be removed.
This should not have any functional change, but prepare for later patch.
Signed-off-by: Yisheng Xie
---
drivers/iommu/arm-smmu-v3.c | 11
owever, it need to save the msis setting at probe if smmu do not
support hardware retention.
Signed-off-by: Yisheng Xie
---
drivers/iommu/arm-smmu-v3.c | 69 +++--
1 file changed, 66 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/arm-smmu-v3.c b/dri
truct
arm_smmu_msi_val
to keep the value of smmuv3's msi register which can be restore when reset
device
after probed.
Yisheng Xie (2):
iommu/arm-smmu-v3: Remove bypass in arm_smmu_reset_device
iommu/arm-smmu-v3: Support software retention for pm_resume
drivers/iommu/arm-smmu
Hi Vivek,
On 2018/4/11 13:15, Vivek Gautam wrote:
> Hi Yisheng,
>
>
> On 4/11/2018 6:52 AM, Yisheng Xie wrote:
>> Hi Tomasz,
>>
>> On 2018/4/10 21:14, Tomasz Figa wrote:
>>> Hi Yisheng,
>>>
>>> Sorry, I think we missed your question
Hi Tomasz,
On 2018/4/10 21:14, Tomasz Figa wrote:
> Hi Yisheng,
>
> Sorry, I think we missed your question here.
>
> On Wed, Mar 28, 2018 at 3:12 PM Yisheng Xie wrote:
>
>> Hi Vivek,
>
>> On 2018/3/28 12:37, Vivek Gautam wrote:
>>> Hi Yisheng
>
Hi Vivek,
On 2018/3/28 12:37, Vivek Gautam wrote:
> Hi Yisheng
>
>
> On 3/28/2018 6:54 AM, Yisheng Xie wrote:
>> Hi Vivek,
>>
>> On 2018/3/13 16:55, Vivek Gautam wrote:
>>> +- power-domains: Specifiers for power domains required to be powered on
>
Hi Jean,
On 2018/3/21 21:24, Jean-Philippe Brucker wrote:
> Hi Yisheng,
>
> On 19/03/18 11:03, Yisheng Xie wrote:
>> Hi Jean,
>>
>> [...]
>>> @@ -3168,6 +3260,13 @@ static int arm_smmu_device_probe(struct
>>> platform_device *pdev)
>>>
Hi Jean,
[...]
> @@ -3168,6 +3260,13 @@ static int arm_smmu_device_probe(struct
> platform_device *pdev)
> if (ret)
> return ret;
>
> + if (smmu->features & (ARM_SMMU_FEAT_STALLS | ARM_SMMU_FEAT_PRI)) {
> + smmu->faultq_nb.notifier_call = arm_smmu_flush_queue
Hi Jean,
vfio can be compiled as module, however you use some functions which are not
exported.
comment inline:
[...]
> Add two new ioctl for VFIO containers. VFIO_IOMMU_BIND_PROCESS creates a
> bond between a container and a process address space, identified by a
> device-specific ID named PASI
Hi Jean,
On 2018/2/22 14:23, Jean-Philippe Brucker wrote:
> @@ -129,7 +439,10 @@ int iommu_sva_device_shutdown(struct device *dev)
> int iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, int
> *pasid,
> unsigned long flags, void *drvdata)
> {
> + int i,
ould it
also
enable related feature for SMMUv3?
Thanks
Yisheng Xie
> +
> /*
>* If the CPU is using VHE, but the SMMU doesn't support it, the SMMU
>* will create TLB entries for NH-EL1 world and will miss the
>
_
hi jean,
On 2017/11/29 23:01, Jean-Philippe Brucker wrote:
> Hello,
>
> On 29/11/17 06:15, Yisheng Xie wrote:
>> Hi Jean,
>>
>> On 2017/10/6 21:31, Jean-Philippe Brucker wrote:
>>> - if (domain->ext_handler) {
>>> + if (do
Hi, Jean,
On 2017/11/29 23:01, Jean-Philippe Brucker wrote:
> On 29/11/17 06:08, Yisheng Xie wrote:
>>
>>
>> On 2017/10/6 21:31, Jean-Philippe Brucker wrote:
>>> +int iommu_process_bind_device(struct device *dev, struct task_struct *task,
>>> +
On 2017/10/6 21:31, Jean-Philippe Brucker wrote:
> +int iommu_process_bind_device(struct device *dev, struct task_struct *task,
> + int *pasid, int flags)
> +{
[..]
> + err = iommu_process_attach_locked(context, dev);
> + if (err)
ret = domain->ext_handler(domain, dev, fault,
> domain->handler_token);
Thanks
Yisheng Xie
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O: inval ATC */
> + }
> + spin_unlock(&smmu_domain->devices_lock);
> +
> + arm_smmu_write_ctx_desc(smmu_domain, process->pasid, NULL);
> +
> + /* TODO: Invalidate all mappings if not DVM */
> +}
> +
Thanks
Yisheng Xie
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On 2017/11/3 17:37, Jean-Philippe Brucker wrote:
> On 03/11/17 05:45, Yisheng Xie wrote:
>> Hi Jean,
>>
>> On 2017/11/3 1:02, Shameerali Kolothum Thodi wrote:
>>>
>>>
>>>> -Original Message-
>>>> From: Jean-Philippe Bru
Hi Jean,
On 2017/11/3 1:02, Shameerali Kolothum Thodi wrote:
>
>
>> -Original Message-
>> From: Jean-Philippe Brucker [mailto:jean-philippe.bruc...@arm.com]
>> Sent: Thursday, November 02, 2017 3:52 PM
>> To: Shameerali Kolothum Thodi
>> Cc: linux-arm-ker...@lists.infradead.org; linux-.
Hi Will,
On 2017/10/20 16:36, Will Deacon wrote:
> On Fri, Oct 20, 2017 at 03:00:01PM +0800, Yisheng Xie wrote:
>> Any comment about this version?
>
> I have it queued up and plan to send a pull request to Joerg today for 4.15.
Fine, thanks.
Thanks
Yishen
Hi Will & Jean,
Any comment about this version?
Thanks
Yisheng Xie
On 2017/9/21 20:36, Yisheng Xie wrote:
> According to Spec, it is ILLEGAL to set STE.S1STALLD if STALL_MODEL
> is not 0b00, which means we should not disable stall mode if stall
> or terminate mode is no
Hi Jean,
Thanks for replying.
On 2017/10/9 19:36, Jean-Philippe Brucker wrote:
> Hi,
>
> On 09/10/17 10:49, Yisheng Xie wrote:
>> Hi Jean,
>>
>> On 2017/10/6 21:31, Jean-Philippe Brucker wrote:
>>> Following discussions at plumbers and elsewhere, it seems l
t;
> * It's up to the driver implementation to decide where to implement the
> PASID tables. For SMMU it's more convenient to have a single PASID table
> per domain. And I think the model fits better with the existing IOMMU
> API: IOVA traffic is shared by all de
FORCE0b0 0b1
after apply this patch.
Signed-off-by: Yisheng Xie
---
v2:
* Keep the feature bits backward compatible and add new one at the end
* Avoid ILLEGAL of CD.S - both as Jean's suggestion.
drivers/iommu/arm-smmu-v3.c | 15 ---
1 file changed, 12 insertions(+), 3
Hi Jean-Philippe,
Thanks for reviewing.
On 2017/9/19 19:43, Jean-Philippe Brucker wrote:
> On 14/09/17 06:08, Yisheng Xie wrote:
>> According to Spec, it is ILLEGAL to set STE.S1STALLD if STALL_MODEL
>> is not 0b00, which means we should not disable stall mode if stall
>> or
TALLS 0b1
0b01 !ARM_SMMU_FEAT_STALLS && !ARM_SMMU_FEAT_STALL_FORCE 0b0
0b10 ARM_SMMU_FEAT_STALLS && ARM_SMMU_FEAT_STALL_FORCE 0b0
Signed-off-by: Yisheng Xie
---
drivers/iommu/arm-smmu-v3.c | 11 +++
1 file changed, 7 insertions(+), 4 del
Hi Will,
On 2017/9/13 11:06, Will Deacon wrote:
> On Tue, Sep 05, 2017 at 01:54:19PM +0100, Jean-Philippe Brucker wrote:
>> On 31/08/17 09:20, Yisheng Xie wrote:
>>> It is ILLEGAL to set STE.S1STALLD if STALL_MODEL is not 0b00, which
>>> means we should not disable st
Hi Jean-Philippe,
On 2017/9/5 20:54, Jean-Philippe Brucker wrote:
> On 31/08/17 09:20, Yisheng Xie wrote:
>> It is ILLEGAL to set STE.S1STALLD if STALL_MODEL is not 0b00, which
>> means we should not disable stall mode if stall/terminate mode is not
>> configuable.
>&g
Hi Jean-Philippe,
On 2017/9/6 8:51, Bob Liu wrote:
> On 2017/9/5 20:53, Jean-Philippe Brucker wrote:
>> On 31/08/17 09:20, Yisheng Xie wrote:
>>> From: Jean-Philippe Brucker
>>>
>>> Platform device can realise SVM function by using the stall mode. That
>&g
Hi Jean-Philippe,
On 2017/9/5 20:56, Jean-Philippe Brucker wrote:
> On 31/08/17 09:20, Yisheng Xie wrote:
>> Jean-Philippe has post a patchset for Adding PCIe SVM support to ARM SMMUv3:
>> https://www.spinics.net/lists/arm-kernel/msg565155.html
>>
>> But for some p
From: Jean-Philippe Brucker
Platform device can realise SVM function by using the stall mode. That
is to say, when device access a memory via iova which is not populated,
it will stalled and when SMMU try to translate this iova, it also will
stall and meanwhile send an event to CPU via MSI.
Afte
From: Jean-Philippe Brucker
Document the bindings for stall and PASID capable platform devices.
Signed-off-by: Jean-Philippe Brucker
---
Documentation/devicetree/bindings/iommu/iommu.txt | 13 +
1 file changed, 13 insertions(+)
diff --git a/Documentation/devicetree/bindings/iommu/
32 pasid bits.
And this should be enough for platform device. Anyway, this is just a RFC.
Signed-off-by: Yisheng Xie
---
drivers/acpi/arm64/iort.c | 20
include/acpi/actbl2.h | 5 +
2 files changed, 25 insertions(+)
diff --git a/drivers/acpi/arm64/iort.c b/drivers
From: Jean-Philippe Brucker
Add stall and pasid properties to iommu_fwspec.
Signed-off-by: Jean-Philippe Brucker
---
drivers/iommu/of_iommu.c | 11 +++
include/linux/iommu.h| 2 ++
2 files changed, 12 insertions(+)
diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c
arm_smmu_bind_task() when smmu do not
support the feature of SVM.
Signed-off-by: Yisheng Xie
---
drivers/iommu/arm-smmu-v3.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index d44256a..dbda2eb 100644
--- a/drivers/iommu/arm-smmu-v3.c
properties to iommu_fwspec
iommu/arm-smmu-v3: Add SVM support for platform devices
Yisheng Xie (3):
ACPI: IORT: Add stall and pasid properties to iommu_fwspec
iommu/arm-smmu-v3: fix panic when handle stall mode irq
iommu/arm-smmu-v3: Avoid ILLEGAL setting of STE.S1STALLD and CD.S
atch add ARM_SMMU_FEAT_TERMINATE feature bit for smmu, and use
TERMINATE feature checking to ensue above ILLEGAL cases from happening.
Signed-off-by: Yisheng Xie
---
drivers/iommu/arm-smmu-v3.c | 22 --
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/drivers/iommu/
Hi Jérôme and Jean-Philippe ,
Get it, thanks for all of your detail explain.
Thanks
Yisheng Xie
On 2017/7/17 22:27, Jerome Glisse wrote:
> On Mon, Jul 17, 2017 at 07:57:23PM +0800, Yisheng Xie wrote:
>> Hi Jean-Philippe，
>>
>> On 2017/6/12 19:37, Jean-Philippe Bru
id* p = clSVMAlloc (
context, // an OpenCL context where this buffer is available
CL_MEM_READ_WRITE | CL_MEM_SVM_FINE_GRAIN_BUFFER,
size, // amount of memory to allocate (in bytes)
0 // alignment in bytes (0 means default)
);
where this RAM come from， device RAM or
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