ASID/VMID
Signed-off-by: Tirumalesh Chalamarla
Signed-off-by: Akula Geethasowjanya
---
Documentation/arm64/silicon-errata.txt | 1 +
.../devicetree/bindings/iommu/arm,smmu.txt | 1 +
drivers/iommu/arm-smmu.c | 42 --
3 files
On 03/04/2016 12:59 PM, Will Deacon wrote:
On Fri, Mar 04, 2016 at 10:39:44AM -0800, Tirumalesh Chalamarla wrote:
Due to Errata#27704 CN88xx SMMUv2,supports only shared ASID and VMID
namespaces; specifically within a given node SMMU0 and SMMU1 share,
as does SMMU2 and SMMU3.
This patch make
ASID/VMID
Signed-off-by: Tirumalesh Chalamarla
Signed-off-by: Akula Geethasowjanya
---
Documentation/arm64/silicon-errata.txt | 1 +
.../devicetree/bindings/iommu/arm,smmu.txt | 1 +
drivers/iommu/arm-smmu.c | 42 --
3 files
On 03/04/2016 10:09 AM, Tirumalesh Chalamarla wrote:
On 03/04/2016 08:02 AM, Will Deacon wrote:
On Thu, Mar 03, 2016 at 07:44:03PM -0800, Tirumalesh Chalamarla wrote:
Due to Errata#27704 CN88xx SMMUv2,supports only shared ASID and VMID
namespaces; specifically within a given node SMMU0
On 03/04/2016 08:02 AM, Will Deacon wrote:
On Thu, Mar 03, 2016 at 07:44:03PM -0800, Tirumalesh Chalamarla wrote:
Due to Errata#27704 CN88xx SMMUv2,supports only shared ASID and VMID
namespaces; specifically within a given node SMMU0 and SMMU1 share,
as does SMMU2 and SMMU3.
This patch make
.
changes from V2:
- removed *_base from DT, and replaced with compatible string
changes from V1:
- rebased on top of 16 bit VMID patch
- removed redundent options from DT
- insted of transform, DT now supplies starting ASID/VMID
Signed-off-by: Tirumalesh Chalamarla
On 03/02/2016 05:10 AM, Robin Murphy wrote:
On 24/02/16 21:13, Tirumalesh Chalamarla wrote:
Due to Errata#27704 CN88xx SMMUv2,supports only shared ASID and VMID
namespaces; specifically within a given node SMMU0 and SMMU1 share,
as does SMMU2 and SMMU3.
This patch address these issuee by
: Tirumalesh Chalamarla
Signed-off-by: Akula Geethasowjanya
---
.../devicetree/bindings/iommu/arm,smmu.txt | 1 +
drivers/iommu/arm-smmu.c | 48 +-
2 files changed, 38 insertions(+), 11 deletions(-)
diff --git a/Documentation/devicetree/bindings
from DT, and replaced with compatible string
changes from V1:
- rebased on top of 16 bit VMID patch
- removed redundent options from DT
- insted of transform, DT now supplies starting ASID/VMID
Signed-off-by: Tirumalesh Chalamarla
Signed-off-by: Akula Geethasowjanya
On 02/24/2016 11:10 AM, Mark Rutland wrote:
On Wed, Feb 24, 2016 at 03:54:48PM +, Chalamarla, Tirumalesh wrote:
On 2/24/16, 3:32 AM, "Mark Rutland" wrote:
On Tue, Feb 23, 2016 at 03:50:21PM -0800, Tirumalesh Chalamarla wrote:
in Summary,
if i change asid-base to cavium,asi
On 02/24/2016 05:38 AM, Robin Murphy wrote:
On 23/02/16 23:56, Tirumalesh Chalamarla wrote:
On 02/23/2016 04:19 AM, Robin Murphy wrote:
On 18/02/16 18:29, tchalama...@caviumnetworks.com wrote:
From: Tirumalesh Chalamarla
Due to Errata#27704 CN88xx SMMUv2,supports only shared ASID and
On 02/23/2016 04:19 AM, Robin Murphy wrote:
On 18/02/16 18:29, tchalama...@caviumnetworks.com wrote:
From: Tirumalesh Chalamarla
Due to Errata#27704 CN88xx SMMUv2,supports only shared ASID and VMID
namespaces; specifically within a given node SMMU0 and SMMU1 share,
as does SMMU2 and SMMU3
On 02/23/2016 04:26 AM, Mark Rutland wrote:
On Thu, Feb 18, 2016 at 10:29:18AM -0800, tchalama...@caviumnetworks.com wrote:
From: Tirumalesh Chalamarla
Due to Errata#27704 CN88xx SMMUv2,supports only shared ASID and VMID
namespaces; specifically within a given node SMMU0 and SMMU1 share
,
Tirumalesh.
On 02/23/2016 04:26 AM, Mark Rutland wrote:
On Thu, Feb 18, 2016 at 10:29:18AM -0800, tchalama...@caviumnetworks.com wrote:
From: Tirumalesh Chalamarla
Due to Errata#27704 CN88xx SMMUv2,supports only shared ASID and VMID
namespaces; specifically within a given node SMMU0 and SMMU1
ARM-SMMUv2 supports upto 16 bit VMID. This patch enables
16 bit VMID when HW supports.
Changes from V2:
- Bug fix.
- Removed not needed prints and comments.
changes from V1:
- Remove DT Property and enable 16 bit VMID if ID says.
Signed-off-by: Tirumalesh Chalamarla
On 02/23/2016 03:22 AM, Will Deacon wrote:
Hi Tirumalesh,
I still have some questions and comments about this.
On Fri, Feb 19, 2016 at 10:33:33AM -0800, tchalama...@caviumnetworks.com wrote:
From: Tirumalesh Chalamarla
ARM-SMMUv2 supports upto 16 bit VMID. This patch enables
16 bit VMID
On 02/19/2016 09:13 AM, Will Deacon wrote:
On Thu, Feb 18, 2016 at 10:23:37AM -0800, tchalama...@caviumnetworks.com wrote:
From: Tirumalesh Chalamarla
ARM-SMMUv2 supports upto 16 bit VMID. This patch enables
16 bit VMID when requested from device-tree.
Signed-off-by: Tirumalesh Chalamarla
registers incorrectly zero extended
when they should instead behave as normal 32-bit register pairs.
Signed-off-by: Tirumalesh Chalamarla
---
Changes from V1:
- Introduced smmu_writeq
drivers/iommu/arm-smmu.c | 45 +
1 file changed, 25
On Mon, Sep 1, 2014 at 8:12 AM, Will Deacon wrote:
> On Mon, Sep 01, 2014 at 02:49:58PM +0100, tirumalesh chalamarla wrote:
>> On Mon, Sep 1, 2014 at 4:42 AM, Will Deacon wrote:
>> > Assuming I understand the problem correctly, why not simply remove the
>> > trunca
Hi Will,
On Mon, Sep 1, 2014 at 4:42 AM, Will Deacon wrote:
> Hi Tirumalesh,
>
> On Wed, Aug 27, 2014 at 07:02:21PM +0100, c.tirumal...@gmail.com wrote:
>> From: Tirumalesh Chalamarla
>>
>> This patch modifes output_mask calculation logic for stage 1 and allow
>
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