I meant to edit the preamble with no reference to init. This patch will prevent
any device with an RMRR association from getting placed into the SI Domain and
any time.
Tom
-Original Message-
From: Mingarelli, Thomas
Sent: Wednesday, October 17, 2012 4:17 PM
To: Alex Williamson
I imagine there could be other devices that get a "free ride". Any help or
suggestions in that area are greatly appreciated.
Tom
-Original Message-
From: Khan, Shuah
Sent: Tuesday, October 16, 2012 12:28 PM
To: Mingarelli, Thomas
Cc: Alex Williamson; David Woodhouse;
: Tuesday, October 16, 2012 12:26 PM
To: Mingarelli, Thomas
Cc: Alex Williamson; David Woodhouse; Don Dutile; Knippers, Linda;
iommu@lists.linux-foundation.org; linux-ker...@vger.kernel.org;
shuahk...@gmail.com
Subject: Re: [PATCH v3] Prevent devices with RMRRs from being placed into SI
Domain during
[mailto:alex.william...@redhat.com]
Sent: Tuesday, October 16, 2012 12:00 PM
To: Mingarelli, Thomas
Cc: David Woodhouse; Don Dutile; Khan, Shuah; Knippers, Linda;
iommu@lists.linux-foundation.org; linux-ker...@vger.kernel.org
Subject: Re: [PATCH v3] Prevent devices with RMRRs from being placed into SI
hanks,
Tom
-Original Message-
From: David Woodhouse [mailto:dw...@infradead.org]
Sent: Friday, September 28, 2012 2:15 PM
To: Knippers, Linda
Cc: Alex Williamson; Joerg Roedel; iommu@lists.linux-foundation.org; Khan,
Shuah; Mingarelli, Thomas
Subject: Re: [PATCH v2] Intel IOMMU pat
I think this sounds like a separate patch.
Tom
-Original Message-
From: Knippers, Linda
Sent: Thursday, September 27, 2012 4:51 PM
To: Alex Williamson
Cc: Mingarelli, Thomas; iommu@lists.linux-foundation.org; Khan, Shuah; Don
Dutile; David Woodhouse
Subject: Re: [PATCH v2] Intel IOMMU
: Mingarelli, Thomas
Cc: iommu@lists.linux-foundation.org; Knippers, Linda; Khan, Shuah; Don Dutile;
David Woodhouse
Subject: Re: [PATCH v2] Intel IOMMU patch to reprocess RMRR info
[adding David Woodhouse]
On Tue, 2012-09-18 at 16:49 +, Tom Mingarelli wrote:
> When a 32bit PCI device is remo
This patch is being submitted to handle the case where a pci device is
placed into the si domain, when booting in iommu passthrough mode, then
removed. The RMRR information for such devices need to be re-processed
to avoid DMA Read errors due to the Present Bit being cleared in the
device's context