The IOMMU in many SoC depends on the MM clocks and power-domain which
are device_initcall normally, thus the subsys_init here is not helpful.
This patch switches it to module_platform_driver which allow the
driver built as module.
Correspondingly switch the config to tristate.
Signed-off-by: Yong
This patch only adds support for building the IOMMU-v1 driver as module.
Correspondingly switch the config to tristate.
Signed-off-by: Yong Wu
---
rebase on v5.12-rc2.
---
drivers/iommu/Kconfig| 2 +-
drivers/iommu/mtk_iommu_v1.c | 9 -
2 files changed, 5 insertions(+), 6 deletio
On 3/1/21 8:12 PM, John Garry wrote:
Now that the core code handles flushing per-IOVA domain CPU rcaches,
remove the handling here.
Signed-off-by: John Garry
---
drivers/iommu/intel/iommu.c | 31 ---
include/linux/cpuhotplug.h | 1 -
2 files changed, 32 deletio
When SWIOTLB_NO_FORCE is used, there should really be no allocations of
default_nslabs to occur since we are not going to use those slabs. If a
platform was somehow setting swiotlb_no_force and a later call to
swiotlb_init() was to be made we would still be proceeding with
allocating the default SW
Hi Eric,
在 2021/3/22 17:05, Auger Eric 写道:
Hi Chenxiang,
On 3/22/21 7:40 AM, chenxiang (M) wrote:
Hi Eric,
在 2021/3/20 1:36, Auger Eric 写道:
Hi Chenxiang,
On 3/4/21 8:55 AM, chenxiang (M) wrote:
Hi Eric,
在 2021/2/24 4:56, Eric Auger 写道:
Implement domain-selective, pasid selective and p
Make some functions static as they are only used inside pasid.c.
Signed-off-by: Lu Baolu
---
drivers/iommu/intel/pasid.c | 4 ++--
drivers/iommu/intel/pasid.h | 2 --
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c
index f2
Some functions have been deprecated. Remove the remaining function
delarations.
Signed-off-by: Lu Baolu
---
drivers/iommu/intel/pasid.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/iommu/intel/pasid.h b/drivers/iommu/intel/pasid.h
index 444c0bec221a..90a3268d7a77 100644
--- a/dr
The SVM_FLAG_PRIVATE_PASID has never been referenced in the tree, and
there's no plan to have anything to use it. So cleanup it.
Signed-off-by: Lu Baolu
---
drivers/iommu/intel/svm.c | 40 ++-
include/linux/intel-svm.h | 16 +++-
2 files changed, 2
The svm_dev_ops has never been referenced in the tree, and there's no
plan to have anything to use it. Remove it to make the code neat.
Signed-off-by: Lu Baolu
---
drivers/iommu/intel/svm.c | 15 +--
include/linux/intel-iommu.h | 3 ---
include/linux/intel-svm.h | 7 ---
3
With commit c588072bba6b5 ("iommu/vt-d: Convert intel iommu driver to
the iommu ops"), the trace events for dma map/unmap have no users any
more. Cleanup them to make the code neat.
Signed-off-by: Lu Baolu
---
include/trace/events/intel_iommu.h | 120 -
1 file changed
Hi Joerg et al,
This series includes several cleanups in the VT-d driver. Please help to
review.
Best regards,
baolu
Lu Baolu (5):
iommu/vt-d: Remove unused dma map/unmap trace events
iommu/vt-d: Remove svm_dev_ops
iommu/vt-d: Remove SVM_FLAG_PRIVATE_PASID
iommu/vt-d: Remove unused funct
Hi Mark,
On Sun, Mar 21, 2021, at 19:35, Mark Kettenis wrote:
>
> Guess we do need to understand a little bit better how the USB DART
> actually works. My hypothesis (based on our discussion on #asahi) is
> that the XHCI host controller and the peripheral controller of the
> DWC3 block use diff
> -Original Message-
> From: Shameerali Kolothum Thodi
>
> Sent: Monday, March 22, 2021 3:36 AM
> To: Kaneda, Erik ; linux-arm-
> ker...@lists.infradead.org; linux-a...@vger.kernel.org; iommu@lists.linux-
> foundation.org; de...@acpica.org; Lorenzo Pieralisi
> ; Moore, Robert
> Cc: Linu
Hi Rob,
On Mon, Mar 22, 2021, at 01:15, Rob Herring wrote:
>
> This check can fail if there are any dependencies. The base for a patch
> series is generally the most recent rc1.
>
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is insta
On 01/03/2021 12:12, John Garry wrote:
The Intel IOMMU driver supports flushing the per-CPU rcaches when a CPU is
offlined.
Let's move it to core code, so everyone can take advantage.
Also correct a code comment.
Based on v5.12-rc1. Tested on arm64 only.
Hi guys,
Friendly reminder ...
Than
On Tue, Mar 02, 2021 at 02:13:57AM -0800, Jacob Pan wrote:
> Write protect bit, when set, inhibits supervisor writes to the read-only
> pages. In supervisor shared virtual addressing (SVA), where page tables
> are shared between CPU and DMA, IOMMU PASID entry WPE bit should match
> CR0.WP bit in th
On 19/03/2021 19:20, Robin Murphy wrote:
Hi Robin,
So then we have the issue of how to dynamically increase this rcache
threshold. The problem is that we may have many devices associated with
the same domain. So, in theory, we can't assume that when we increase
the threshold that some other dev
On Wed, 10 Feb 2021 09:13:13 -0700, Jon Derrick wrote:
> The Intel Volume Management Device acts similar to a PCI-to-PCI bridge in that
> it changes downstream devices' requester-ids to its own. As VMD supports PCIe
> devices, it has its own MSI-X table and transmits child device MSI-X by
> remappi
On Fri, Mar 19, 2021 at 11:22:21AM -0700, Jacob Pan wrote:
> Hi Jason,
>
> On Fri, 19 Mar 2021 10:54:32 -0300, Jason Gunthorpe wrote:
>
> > On Fri, Mar 19, 2021 at 02:41:32PM +0100, Jean-Philippe Brucker wrote:
> > > On Fri, Mar 19, 2021 at 09:46:45AM -0300, Jason Gunthorpe wrote:
> > > > On F
[+]
Hi Erik,
As this is now just merged ino acpica-master and based on the discussion we had
here,
https://github.com/acpica/acpica/pull/638
I had a discussion with ARM folks(Lorenzo) in the linaro-open-discussions call
and
can confirm that the IORT Revision E is not the final specification a
On Fri, Mar 19, 2021 at 11:22:21AM -0700, Jacob Pan wrote:
> Hi Jason,
>
> On Fri, 19 Mar 2021 10:54:32 -0300, Jason Gunthorpe wrote:
>
> > On Fri, Mar 19, 2021 at 02:41:32PM +0100, Jean-Philippe Brucker wrote:
> > > On Fri, Mar 19, 2021 at 09:46:45AM -0300, Jason Gunthorpe wrote:
> > > > On F
Hi Chenxiang,
On 3/22/21 7:40 AM, chenxiang (M) wrote:
> Hi Eric,
>
>
> 在 2021/3/20 1:36, Auger Eric 写道:
>> Hi Chenxiang,
>>
>> On 3/4/21 8:55 AM, chenxiang (M) wrote:
>>> Hi Eric,
>>>
>>>
>>> 在 2021/2/24 4:56, Eric Auger 写道:
Implement domain-selective, pasid selective and page-selective
>>
On Sat, Mar 20, 2021 at 08:37:40PM -0700, Florian Fainelli wrote:
> - if (!strcmp(str, "force")) {
> + if (!strcmp(str, "force"))
> swiotlb_force = SWIOTLB_FORCE;
> - } else if (!strcmp(str, "noforce")) {
> + else if (!strcmp(str, "noforce"))
> swiotlb_fo
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