On Wed, 2021-01-13 at 14:30 +0900, Tomasz Figa wrote:
> On Thu, Dec 24, 2020 at 8:35 PM Yong Wu wrote:
> >
> > On Wed, 2020-12-23 at 17:18 +0900, Tomasz Figa wrote:
> > > On Wed, Dec 09, 2020 at 04:00:41PM +0800, Yong Wu wrote:
> > > > This patch adds decriptions for mt8192 IOMMU and SMI.
> > > >
Hi Vivek,
> From: Vivek Gautam
> Sent: Tuesday, January 12, 2021 7:06 PM
>
> Hi Yi,
>
>
> On Tue, Jan 12, 2021 at 2:51 PM Liu, Yi L wrote:
> >
> > Hi Vivek,
> >
> > > From: Vivek Gautam
> > > Sent: Tuesday, January 12, 2021 2:50 PM
> > >
> > > Hi Yi,
> > >
> > >
> > > On Thu, Sep 10, 2020 at
On Thu, Dec 24, 2020 at 8:35 PM Yong Wu wrote:
>
> On Wed, 2020-12-23 at 17:18 +0900, Tomasz Figa wrote:
> > On Wed, Dec 09, 2020 at 04:00:41PM +0800, Yong Wu wrote:
> > > This patch adds decriptions for mt8192 IOMMU and SMI.
> > >
> > > mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descripto
On Thu, Dec 24, 2020 at 8:27 PM Yong Wu wrote:
>
> On Wed, 2020-12-23 at 17:15 +0900, Tomasz Figa wrote:
> > Hi Yong,
> >
> > On Wed, Dec 09, 2020 at 04:00:39PM +0800, Yong Wu wrote:
> > > In the latest SoC, there are several HW IP require a sepecial iova
> > > range, mainly CCU and VPU has this r
On 1/12/2021 8:25 PM, Tomasz Figa wrote:
> On Wed, Jan 13, 2021 at 12:56 PM Florian Fainelli
> wrote:
>>
>>
>>
>> On 1/12/2021 6:29 PM, Tomasz Figa wrote:
>>> Hi Florian,
>>>
>>> On Wed, Jan 13, 2021 at 3:01 AM Florian Fainelli
>>> wrote:
On 1/11/21 11:48 PM, Claire Chang wrote:
>>
On Wed, Jan 13, 2021 at 12:56 PM Florian Fainelli wrote:
>
>
>
> On 1/12/2021 6:29 PM, Tomasz Figa wrote:
> > Hi Florian,
> >
> > On Wed, Jan 13, 2021 at 3:01 AM Florian Fainelli
> > wrote:
> >>
> >> On 1/11/21 11:48 PM, Claire Chang wrote:
> >>> On Fri, Jan 8, 2021 at 1:59 AM Florian Fainelli
On 1/12/2021 6:29 PM, Tomasz Figa wrote:
> Hi Florian,
>
> On Wed, Jan 13, 2021 at 3:01 AM Florian Fainelli wrote:
>>
>> On 1/11/21 11:48 PM, Claire Chang wrote:
>>> On Fri, Jan 8, 2021 at 1:59 AM Florian Fainelli
>>> wrote:
On 1/7/21 9:42 AM, Claire Chang wrote:
>> Can yo
On Thu, 07 Jan 2021 20:01:18 +0530, Manivannan Sadhasivam wrote:
> Add devicetree binding for Qualcomm SDX55 SMMU.
>
> Cc: Will Deacon
> Cc: Robin Murphy
> Cc: Joerg Roedel
> Cc: iommu@lists.linux-foundation.org
> Signed-off-by: Manivannan Sadhasivam
> Reviewed-by: Vinod Koul
> ---
> Documen
Hi Jean,
On 1/12/21 5:16 PM, Jean-Philippe Brucker wrote:
Hi Baolu,
On Tue, Jan 12, 2021 at 12:31:23PM +0800, Lu Baolu wrote:
Hi Jean,
On 1/8/21 10:52 PM, Jean-Philippe Brucker wrote:
Some devices manage I/O Page Faults (IOPF) themselves instead of relying
on PCIe PRI or Arm SMMU stall. Allo
On 2021-01-12 16:33, Christoph Hellwig wrote:
On Tue, Jan 12, 2021 at 04:00:59PM +, Robin Murphy wrote:
Out of curiosity, how much of the difference is attributable to actual
indirect call overhead vs. the additional massive reduction in visits to
arm_smmu_rpm_{get,put} that you fail to ment
Hi,
On 1/12/21 10:38 PM, Will Deacon wrote:
[Expanding cc list to include DMA-IOMMU and intel IOMMU folks]
On Fri, Jan 08, 2021 at 04:18:36PM -0500, Chuck Lever wrote:
Hi-
[ Please cc: me on replies, I'm not currently subscribed to
iommu@lists ].
I'm running NFS performance tests on InfiniBa
Hi Florian,
On Wed, Jan 13, 2021 at 3:01 AM Florian Fainelli wrote:
>
> On 1/11/21 11:48 PM, Claire Chang wrote:
> > On Fri, Jan 8, 2021 at 1:59 AM Florian Fainelli
> > wrote:
> >>
> >> On 1/7/21 9:42 AM, Claire Chang wrote:
> >>
> Can you explain how ATF gets involved and to what extent i
On 2021-01-07 17:57, Konrad Rzeszutek Wilk wrote:
On Fri, Jan 08, 2021 at 01:39:18AM +0800, Claire Chang wrote:
Hi Greg and Konrad,
This change is intended to be non-arch specific. Any arch that lacks DMA access
control and has devices not behind an IOMMU can make use of it. Could you share
why
On 1/5/21 7:41 PM, Claire Chang wrote:
> Add the initialization function to create restricted DMA pools from
> matching reserved-memory nodes in the device tree.
>
> Signed-off-by: Claire Chang
> ---
> include/linux/device.h | 4 ++
> include/linux/swiotlb.h | 7 +-
> kernel/dma/Kconfig
On 1/7/21 1:19 PM, Konrad Rzeszutek Wilk wrote:
> On Thu, Jan 07, 2021 at 10:09:14AM -0800, Florian Fainelli wrote:
>> On 1/7/21 9:57 AM, Konrad Rzeszutek Wilk wrote:
>>> On Fri, Jan 08, 2021 at 01:39:18AM +0800, Claire Chang wrote:
Hi Greg and Konrad,
This change is intended to be n
On 1/5/21 7:41 PM, Claire Chang wrote:
> If a device is not behind an IOMMU, we look up the device node and set
> up the restricted DMA when the restricted-dma-pool is presented.
>
> Signed-off-by: Claire Chang
> ---
[snip]
> +int of_dma_set_restricted_buffer(struct device *dev)
> +{
> + st
On 1/5/21 7:41 PM, Claire Chang wrote:
> Add the functions, swiotlb_alloc and swiotlb_free to support the
> memory allocation from restricted DMA pool.
>
> Signed-off-by: Claire Chang
> ---
[snip]
> diff --git a/kernel/dma/direct.c b/kernel/dma/direct.c
> index 30ccbc08e229..126e9b3354d6 100644
On 1/5/21 7:41 PM, Claire Chang wrote:
> Regardless of swiotlb setting, the restricted DMA pool is preferred if
> available.
>
> The restricted DMA pools provide a basic level of protection against
> the DMA overwriting buffer contents at unexpected times. However, to
> protect against general dat
On Thu, 7 Jan 2021 17:28:57 +0800
Keqian Zhu wrote:
> Defer checking whether vfio_dma is of fully-dirty in update_user_bitmap
> is easy to lose dirty log. For example, after promoting pinned_scope of
> vfio_iommu, vfio_dma is not considered as fully-dirty, then we may lose
> dirty log that occurs
On Tue, Jan 12, 2021 at 12:57 AM Robin Murphy wrote:
>
> On 2021-01-07 13:03, Will Deacon wrote:
> > On Thu, Jan 07, 2021 at 03:03:40PM +0530, Ajay Kumar wrote:
> >> When PCI function drivers(ex:pci-endpoint-test) are probed for already
> >> initialized PCIe-RC(Root Complex), and PCIe-RC is alread
On Tue, 12 Jan 2021 20:04:38 +0800
Keqian Zhu wrote:
> On 2021/1/12 5:49, Alex Williamson wrote:
> > On Thu, 7 Jan 2021 17:29:00 +0800
> > Keqian Zhu wrote:
> >
> >> If we detach group during dirty page tracking, we shouldn't remove
> >> vfio_dma, because dirty log will lose.
> >>
> >> But we
On 2021-01-08 11:38, Chunyan Zhang wrote:
From: Chunyan Zhang
This patch only adds display iommu support, the driver was tested with sprd
dpu.
The iommu support for others would be added once finished tests with those
devices, such as Image codec(jpeg) processor, a few signal processors,
inclu
On Mon, 28 Dec 2020 09:26:14 +0800, Tian Tao wrote:
> linux/dma-map-ops.h is included more than once, Remove the one that
> isn't necessary.
Applied to arm64 (for-next/iommu/fixes), thanks!
[1/1] iommu/vt-d: Fix duplicate included linux/dma-map-ops.h
https://git.kernel.org/arm64/c/694a1c0ad
On Sat, 9 Jan 2021 17:56:21 +0100, Konrad Dybcio wrote:
> SDM630 and MSM8998 are among the SoCs that use Qualcomm's implementation
> of SMMUv2 which has already proven to be problematic over the years. Add
> their compatibles to the lookup list to prevent the platforms from being
> shut down by the
05.11.2020 18:49, Thierry Reding пишет:
> On Thu, Sep 24, 2020 at 07:23:34PM +0300, Dmitry Osipenko wrote:
>> 24.09.2020 17:01, Thierry Reding пишет:
>>> On Thu, Sep 24, 2020 at 04:23:59PM +0300, Dmitry Osipenko wrote:
04.09.2020 15:59, Thierry Reding пишет:
> From: Thierry Reding
>
>
On 1/11/21 11:48 PM, Claire Chang wrote:
> On Fri, Jan 8, 2021 at 1:59 AM Florian Fainelli wrote:
>>
>> On 1/7/21 9:42 AM, Claire Chang wrote:
>>
Can you explain how ATF gets involved and to what extent it does help,
besides enforcing a secure region from the ARM CPU's perpsective? Does
On 2021-01-05 07:52, lijiang wrote:
在 2021年01月05日 11:55, lijiang 写道:
Hi,
Also add Joerg to cc list.
Also add more people to cc list, Jerry Snitselaar and Tom Lendacky.
Thanks.
Thanks.
Lianbo
在 2020年12月26日 13:39, Lianbo Jiang 写道:
Currently, because domain attach allows to be deferred from
On Tue, Jan 12, 2021 at 04:00:59PM +, Robin Murphy wrote:
> Out of curiosity, how much of the difference is attributable to actual
> indirect call overhead vs. the additional massive reduction in visits to
> arm_smmu_rpm_{get,put} that you fail to mention? There are ways to optimise
> indirect
On 2021-01-11 14:54, Isaac J. Manjarres wrote:
The iommu_map_sg() code currently iterates through the given
scatter-gather list, and in the worst case, invokes iommu_map()
for each element in the scatter-gather list, which calls into
the IOMMU driver through an indirect call. For an IOMMU driver
The size of the buffer being bounced is not checked if it happens
to be larger than the size of the mapped buffer. Because the size
can be controlled by a device, as it's the case with virtio devices,
this can lead to memory corruption.
This patch saves the remaining buffer memory for each slab an
[Expanding cc list to include DMA-IOMMU and intel IOMMU folks]
On Fri, Jan 08, 2021 at 04:18:36PM -0500, Chuck Lever wrote:
> Hi-
>
> [ Please cc: me on replies, I'm not currently subscribed to
> iommu@lists ].
>
> I'm running NFS performance tests on InfiniBand using CX-3 Pro cards
> at 56Gb/s.
From: Lu Baolu
[ Upstream commit 420d42f6f9db27d88bc4f83e3e668fcdacbf7e29 ]
Lock(&iommu->lock) without disabling irq causes lockdep warnings.
WARNING: possible irq lock inversion dependency detected
5.11.0-rc1+ #828 Not tainted
--
On 2021/1/12 5:49, Alex Williamson wrote:
> On Thu, 7 Jan 2021 17:29:00 +0800
> Keqian Zhu wrote:
>
>> If we detach group during dirty page tracking, we shouldn't remove
>> vfio_dma, because dirty log will lose.
>>
>> But we don't prevent unmap_unpin_all in vfio_iommu_release, because
>> under
Hi Yi,
On Tue, Jan 12, 2021 at 2:51 PM Liu, Yi L wrote:
>
> Hi Vivek,
>
> > From: Vivek Gautam
> > Sent: Tuesday, January 12, 2021 2:50 PM
> >
> > Hi Yi,
> >
> >
> > On Thu, Sep 10, 2020 at 4:13 PM Liu Yi L wrote:
> > >
> > > This patch is added as instead of returning a boolean for
> > DOMAIN
Hi Vivek,
> From: Vivek Gautam
> Sent: Tuesday, January 12, 2021 2:50 PM
>
> Hi Yi,
>
>
> On Thu, Sep 10, 2020 at 4:13 PM Liu Yi L wrote:
> >
> > This patch is added as instead of returning a boolean for
> DOMAIN_ATTR_NESTING,
> > iommu_domain_get_attr() should return an iommu_nesting_info ha
Hi Baolu,
On Tue, Jan 12, 2021 at 12:31:23PM +0800, Lu Baolu wrote:
> Hi Jean,
>
> On 1/8/21 10:52 PM, Jean-Philippe Brucker wrote:
> > Some devices manage I/O Page Faults (IOPF) themselves instead of relying
> > on PCIe PRI or Arm SMMU stall. Allow their drivers to enable SVA without
> > mandati
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