On Tue Apr 14 20, Joerg Roedel wrote:
Hi,
here is the second version of this patch-set. The first version with
some more introductory text can be found here:
https://lore.kernel.org/lkml/20200407183742.4344-1-j...@8bytes.org/
Changes v1->v2:
* Rebased to v5.7-rc1
* Re
On 2020-05-29 3:11 p.m., Marek Szyprowski wrote:
> Patches are pending:
> https://lore.kernel.org/linux-iommu/20200513132114.6046-1-m.szyprow...@samsung.com/T/
Cool, nice! Though, I still don't think that fixes the issue in
i915_scatterlist.h given it still ignores sg_dma_len() and strictly
rel
Hi Logan,
On 29.05.2020 21:05, Logan Gunthorpe wrote:
> On 2020-05-29 6:45 a.m., Christoph Hellwig wrote:
>> On Thu, May 28, 2020 at 06:00:44PM -0600, Logan Gunthorpe wrote:
This issue is most likely in the i915 driver and is most likely caused by
the driver not respecting the return va
The pull request you sent on Fri, 29 May 2020 20:58:41 +0200:
> git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
> tags/iommu-fixes-v5.7-rc7
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/b58f2140ea8605ee6ea0530d9c0cb5d049f9c7ca
Thank you!
--
Deet-doot-
The driver performs an extra check if the IOMMU's capabilities advertise
presence of performance counters: it verifies that counters are writable
by writing a hard-coded value to a counter and testing that reading that
counter gives back the same value.
Unfortunately it does so quite early, even b
On 2020-05-29 6:45 a.m., Christoph Hellwig wrote:
> On Thu, May 28, 2020 at 06:00:44PM -0600, Logan Gunthorpe wrote:
>>> This issue is most likely in the i915 driver and is most likely caused by
>>> the driver not respecting the return value of the dma_map_ops::map_sg
>>> function. You can see
Hi Linus,
The following changes since commit 9cb1fd0efd195590b828b9b865421ad345a4a145:
Linux 5.7-rc7 (2020-05-24 15:32:54 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
tags/iommu-fixes-v5.7-rc7
for you to fetch changes up to 7c
On Fri, May 29, 2020 at 1:49 PM Rob Herring wrote:
>
> On Tue, May 26, 2020 at 03:12:39PM -0400, Jim Quinlan wrote:
> > v2:
> > Commit: "device core: Add ability to handle multiple dma offsets"
> > o Added helper func attach_dma_pfn_offset_map() in address.c (Chistoph)
> > o Helpers funcs adde
On Fri, May 29, 2020 at 1:35 PM Rob Herring wrote:
>
> On Wed, May 27, 2020 at 9:43 AM Jim Quinlan
> wrote:
> >
> > Hi Nicolas,
> >
> > On Wed, May 27, 2020 at 11:00 AM Nicolas Saenz Julienne
> > wrote:
> > >
> > > Hi Jim,
> > > one thing comes to mind, there is a small test suite in
> > > dri
On Tue, May 26, 2020 at 03:12:39PM -0400, Jim Quinlan wrote:
> v2:
> Commit: "device core: Add ability to handle multiple dma offsets"
> o Added helper func attach_dma_pfn_offset_map() in address.c (Chistoph)
> o Helpers funcs added to __phys_to_dma() & __dma_to_phys() (Christoph)
> o Added w
On Wed, May 27, 2020 at 9:43 AM Jim Quinlan wrote:
>
> Hi Nicolas,
>
> On Wed, May 27, 2020 at 11:00 AM Nicolas Saenz Julienne
> wrote:
> >
> > Hi Jim,
> > one thing comes to mind, there is a small test suite in
> > drivers/of/unittest.c
> > (specifically of_unittest_pci_dma_ranges()) you could
On 5/28/20 4:38 PM, Alex Williamson wrote:
On Thu, 28 May 2020 13:57:42 -0700
Ashok Raj wrote:
All Intel platforms guarantee that all root complex implementations
must send transactions up to IOMMU for address translations. Hence for
RCiEP devices that are Vendor ID Intel, can claim exception
On Wed, May 27, 2020 at 01:53:04PM +0200, Joerg Roedel wrote:
> From: Joerg Roedel
>
> The driver consists of five C files and three header files by now.
> Move them to their own subdirectory to not clutter to iommu top-level
> directory with them.
>
> Signed-off-by: Joerg Roedel
> ---
> MAINT
On Fri, 29 May 2020 15:15:45 +0200
Joerg Roedel wrote:
> Applied, thanks.
>
> On Thu, May 28, 2020 at 11:03:51AM -0700, Jacob Pan wrote:
> > Make intel_svm_unbind_mm() a static function.
> >
> > Fixes: 064a57d7ddfc ("iommu/vt-d: Replace intel SVM APIs with
> > generic SVA APIs")
>
> Please m
Joerg,
On 5/27/2020 6:53 PM, Joerg Roedel wrote:
Hi,
here is a collection of patches that clean up a few things
in the AMD IOMMU driver. Foremost, it moves all related
files of the driver into a separate subdirectory.
But the patches also remove usage of dev->archdata.iommu and
clean up dev_da
On Wed, May 27, 2020 at 04:00:19PM -0500, wu000...@umn.edu wrote:
> From: Qiushi Wu
>
> kobject_init_and_add() takes reference even when it fails.
> Thus, when kobject_init_and_add() returns an error,
> kobject_put() must be called to properly clean up the kobject.
>
> Fixes: d72e31c93746 ("iomm
Applied, thanks.
On Thu, May 28, 2020 at 11:03:51AM -0700, Jacob Pan wrote:
> Make intel_svm_unbind_mm() a static function.
>
> Fixes: 064a57d7ddfc ("iommu/vt-d: Replace intel SVM APIs with generic
> SVA APIs")
Please make sure the fixes tags (or any other tags) are not line-wrapped
in future pa
On Wed, May 27, 2020 at 10:56:14AM -0600, Jon Derrick wrote:
> Jon Derrick (3):
> iommu/vt-d: Only clear real DMA device's context entries
> iommu/vt-d: Allocate domain info for real DMA sub-devices
> iommu/vt-d: Remove real DMA lookup in find_domain
>
> drivers/iommu/intel-iommu.c | 31 +++
On Fri, May 29, 2020 at 07:15:13PM +0700, Suravee Suthikulpanit wrote:
> Thank you for cleaning up.
>
> Reviewed-by: Suravee Suthikulpanit
Thanks for you review, Suravee. Patches are now applied.
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On Thu, Apr 23, 2020 at 02:53:27PM +0200, Jean-Philippe Brucker wrote:
> The IOMMU SVA API currently requires device drivers to implement an
> mm_exit() callback, which stops device jobs that do DMA. This function
> is called in the release() MMU notifier, when an address space that is
> shared wit
On Thu, May 28, 2020 at 06:00:44PM -0600, Logan Gunthorpe wrote:
> > This issue is most likely in the i915 driver and is most likely caused by
> > the driver not respecting the return value of the dma_map_ops::map_sg
> > function. You can see the driver ignoring the return value here:
> > https:/
Hi,
On 2020/5/20 1:54, Jean-Philippe Brucker wrote:
> Some systems allow devices to handle I/O Page Faults in the core mm. For
> example systems implementing the PCIe PRI extension or Arm SMMU stall
> model. Infrastructure for reporting these recoverable page faults was
> added to the IOMMU core b
Hi Baolu,
> -Original Message-
> From: Lu Baolu
> Sent: Thursday, May 28, 2020 7:43 PM
> To: Prakhya, Sai Praneeth ;
> iommu@lists.linux-foundation.org
> Cc: baolu...@linux.intel.com; Christoph Hellwig ; Joerg Roedel
> ; Raj, Ashok ; Will Deacon
> ; Mehta, Sohil ; Robin
> Murphy ; Jacob P
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