Re: [PATCH 09/12] dt-bindings: arm: fsl: Add msi-map device-tree binding for fsl-mc bus

2020-05-22 Thread Diana Craciun OSS
On 5/22/2020 12:42 PM, Robin Murphy wrote: On 2020-05-22 00:10, Rob Herring wrote: On Thu, May 21, 2020 at 7:00 AM Lorenzo Pieralisi wrote: From: Laurentiu Tudor The existing bindings cannot be used to specify the relationship between fsl-mc devices and GIC ITSes. Add a generic binding for

RE: [PATCH v5 0/5] Nvidia Arm SMMUv2 Implementation

2020-05-22 Thread Krishna Reddy
>For the record: I don't think we should apply these because we don't have a >good way of testing them. We currently have three problems that prevent us >from enabling SMMU on Tegra194: Out of three issues pointed here, I see that only issue 2) is a real blocker for enabling SMMU HW by default

Re: [RFC] Use SMMU HTTU for DMA dirty page tracking

2020-05-22 Thread Jean-Philippe Brucker
Hi, On Tue, May 19, 2020 at 05:42:55PM +0800, Xiang Zheng wrote: > Hi all, > > Is there any plan for enabling SMMU HTTU? Not outside of SVA, as far as I know. > I have seen the patch locates in the SVA series patch, which adds > support for HTTU: > https://www.spinics.net/lists/arm-kernel/m

Re: [PATCH 09/12] dt-bindings: arm: fsl: Add msi-map device-tree binding for fsl-mc bus

2020-05-22 Thread Laurentiu Tudor
On 5/22/2020 5:02 PM, Rob Herring wrote: > On Fri, May 22, 2020 at 3:42 AM Robin Murphy wrote: >> >> On 2020-05-22 00:10, Rob Herring wrote: >>> On Thu, May 21, 2020 at 7:00 AM Lorenzo Pieralisi >>> wrote: From: Laurentiu Tudor The existing bindings cannot be used to specify

Re: [PATCH v5 0/5] Nvidia Arm SMMUv2 Implementation

2020-05-22 Thread Thierry Reding
On Thu, May 21, 2020 at 04:31:02PM -0700, Krishna Reddy wrote: > Changes in v5: > Rebased on top of > git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git next > > v4 - https://lkml.org/lkml/2019/10/30/1054 > v3 - https://lkml.org/lkml/2019/10/18/1601 > v2 - https://lkml.org/lkml/2019/9/2

Re: arm-smmu-v3 high cpu usage for NVMe

2020-05-22 Thread John Garry
On 20/03/2020 10:41, John Garry wrote: + Barry, Alexandru     PerfTop:   85864 irqs/sec  kernel:89.6%  exact:  0.0% lost: 0/34434 drop: 0/40116 [4000Hz cycles],  (all, 96 CPUs) -

Re: [PATCH 09/15] device core: Add ability to handle multiple dma offsets

2020-05-22 Thread Jim Quinlan via iommu
Hi Nicolas, On Wed, May 20, 2020 at 7:28 AM Nicolas Saenz Julienne wrote: > > Hi Jim, > thanks for having a go at this! My two cents. > > On Tue, 2020-05-19 at 16:34 -0400, Jim Quinlan wrote: > > The device variable 'dma_pfn_offset' is used to do a single > > linear map between cpu addrs and dma

Re: [PATCH 09/12] dt-bindings: arm: fsl: Add msi-map device-tree binding for fsl-mc bus

2020-05-22 Thread Robin Murphy
On 2020-05-22 15:08, Rob Herring wrote: On Fri, May 22, 2020 at 3:57 AM Diana Craciun OSS wrote: On 5/22/2020 12:42 PM, Robin Murphy wrote: On 2020-05-22 00:10, Rob Herring wrote: On Thu, May 21, 2020 at 7:00 AM Lorenzo Pieralisi wrote: From: Laurentiu Tudor The existing bindings cannot

Re: [PATCH 09/12] dt-bindings: arm: fsl: Add msi-map device-tree binding for fsl-mc bus

2020-05-22 Thread Rob Herring
On Fri, May 22, 2020 at 3:57 AM Diana Craciun OSS wrote: > > On 5/22/2020 12:42 PM, Robin Murphy wrote: > > On 2020-05-22 00:10, Rob Herring wrote: > >> On Thu, May 21, 2020 at 7:00 AM Lorenzo Pieralisi > >> wrote: > >>> > >>> From: Laurentiu Tudor > >>> > >>> The existing bindings cannot be use

Re: [PATCH 09/12] dt-bindings: arm: fsl: Add msi-map device-tree binding for fsl-mc bus

2020-05-22 Thread Rob Herring
On Fri, May 22, 2020 at 3:42 AM Robin Murphy wrote: > > On 2020-05-22 00:10, Rob Herring wrote: > > On Thu, May 21, 2020 at 7:00 AM Lorenzo Pieralisi > > wrote: > >> > >> From: Laurentiu Tudor > >> > >> The existing bindings cannot be used to specify the relationship > >> between fsl-mc devices

[PATCH] iommu: Fix group refcount in iommu_alloc_default_domain()

2020-05-22 Thread Sai Prakash Ranjan
Since the change to move default domain allocation to probe, there is a refcount decrement missing for the group in iommu_alloc_default_domain(). Because of this missing refcount decrement, the device is never released from the group as the devices_kobj refcount never reaches 0 in iommu_group_remov

[PATCH v5 39/38] drm: xen: fix common struct sg_table related issues

2020-05-22 Thread Marek Szyprowski
The Documentation/DMA-API-HOWTO.txt states that the dma_map_sg() function returns the number of the created entries in the DMA address space. However the subsequent calls to the dma_sync_sg_for_{device,cpu}() and dma_unmap_sg must be called with the original number of the entries passed to the dma_

Re: [PATCH v7 13/24] iommu/arm-smmu-v3: Enable broadcast TLB maintenance

2020-05-22 Thread Jean-Philippe Brucker
[+Eric] On Thu, May 21, 2020 at 03:38:35PM +0100, Marc Zyngier wrote: > On 2020-05-21 15:17, Will Deacon wrote: > > [+Marc] > > > > On Tue, May 19, 2020 at 07:54:51PM +0200, Jean-Philippe Brucker wrote: > > > The SMMUv3 can handle invalidation targeted at TLB entries with shared > > > ASIDs. If t

Re: [PATCH 12/12] bus: fsl-mc: Add ACPI support for fsl-mc

2020-05-22 Thread Lorenzo Pieralisi
On Fri, May 22, 2020 at 05:32:02AM +, Makarand Pawagi wrote: [...] > > Subject: Re: [PATCH 12/12] bus: fsl-mc: Add ACPI support for fsl-mc > > > > Hi Lorenzo, > > > > On 5/21/2020 4:00 PM, Lorenzo Pieralisi wrote: > > > From: Diana Craciun > > > > > > Add ACPI support in the fsl-mc driver.

Re: [PATCH 09/12] dt-bindings: arm: fsl: Add msi-map device-tree binding for fsl-mc bus

2020-05-22 Thread Robin Murphy
On 2020-05-22 00:10, Rob Herring wrote: On Thu, May 21, 2020 at 7:00 AM Lorenzo Pieralisi wrote: From: Laurentiu Tudor The existing bindings cannot be used to specify the relationship between fsl-mc devices and GIC ITSes. Add a generic binding for mapping fsl-mc devices to GIC ITSes, using

Re: [PATCH] iommu/dma: limit iova free size to unmmaped iova

2020-05-22 Thread Robin Murphy
On 2020-05-22 07:25, gup...@codeaurora.org wrote: On 2020-05-22 01:46, Robin Murphy wrote: On 2020-05-21 12:30, Prakash Gupta wrote: Limit the iova size while freeing based on unmapped size. In absence of this even with unmap failure, invalid iova is pushed to iova rcache and subsequently can c