On Fri, Apr 12, 2019 at 08:43:32AM +0530, Srinath Mannam wrote:
> Few SOCs have limitation that their PCIe host can't allow few inbound
> address ranges. Allowed inbound address ranges are listed in dma-ranges
> DT property and this address ranges are required to do IOVA mapping.
> Remaining addres
On 12/04/2019 15:59, Joerg Roedel wrote:
> Hey Jean-Philippe,
>
> On Fri, Apr 12, 2019 at 01:23:51PM +0100, Jean-Philippe Brucker wrote:
>> I pushed a cleaner version to git://linux-arm.org/linux-jpb.git sva/api
>> (with the below mistake fixed as well) and can resend if necessary.
>
> No need to
The pull request you sent on Fri, 12 Apr 2019 15:29:44 +0200:
> git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
> tags/iommu-fix-v5.1-rc5
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/4876191cbe2a4702b0067d4156e1d8648ac36801
Thank you!
--
Deet-doot-do
The pull request you sent on Fri, 12 Apr 2019 17:19:01 +0200:
> git://git.infradead.org/users/hch/dma-mapping.git tags/dma-mapping-5.1-1
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/8ee15f3248660f85102a47410079d408615723d4
Thank you!
--
Deet-doot-dot, I am a bot.
The following changes since commit 15ade5d2e7775667cf191cf2f94327a4889f8b9d:
Linux 5.1-rc4 (2019-04-07 14:09:59 -1000)
are available in the Git repository at:
git://git.infradead.org/users/hch/dma-mapping.git tags/dma-mapping-5.1-1
for you to fetch changes up to 8c5165430c0194df92369162d1c7
Hey Jean-Philippe,
On Fri, Apr 12, 2019 at 01:23:51PM +0100, Jean-Philippe Brucker wrote:
> I pushed a cleaner version to git://linux-arm.org/linux-jpb.git sva/api
> (with the below mistake fixed as well) and can resend if necessary.
No need to do that, I solved the conflicts I've seen and compil
The arm/arm64 symbol for big endian builds is CONFIG_CPU_BIG_ENDIAN,
not CONFIG_BIG_ENDIAN.
Signed-off-by: Christoph Hellwig
---
drivers/iommu/qcom_iommu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/qcom_iommu.c b/drivers/iommu/qcom_iommu.c
index 8cdd3f0595
I'm good to have this patch, which helps identify the cause of failure is
fragmentation or it really been used up.
On 4/12/19 4:38 AM, Dongli Zhang wrote:
> When swiotlb is full, the kernel would print io_tlb_used. However, the
> result might be inaccurate at that time because we have left the cri
Hi Linus,
The following changes since commit 15ade5d2e7775667cf191cf2f94327a4889f8b9d:
Linux 5.1-rc4 (2019-04-07 14:09:59 -1000)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
tags/iommu-fix-v5.1-rc5
for you to fetch changes up to 3c67
On 12/04/2019 11:26, John Garry wrote:
On 09/04/2019 13:53, Zhen Lei wrote:
Currently the IOMMU dma contains 3 modes: passthrough, lazy, strict. The
passthrough mode bypass the IOMMU, the lazy mode defer the invalidation
of hardware TLBs, and the strict mode invalidate IOMMU hardware TLBs
synchr
On 11/04/2019 16:28, Joerg Roedel wrote:
> On Wed, Apr 10, 2019 at 04:15:16PM +0100, Jean-Philippe Brucker wrote:
>> drivers/iommu/iommu.c | 104 ++
>> include/linux/iommu.h | 70
>> 2 files changed, 174 insertions(+)
>
> Appli
When swiotlb is full, the kernel would print io_tlb_used. However, the
result might be inaccurate at that time because we have left the critical
section protected by spinlock.
Therefore, we backup the io_tlb_used into local variable before leaving
critical section.
Fixes: 83ca25948940 ("swiotlb:
On Tue, Apr 09, 2019 at 08:53:03PM +0800, Zhen Lei wrote:
> +static int __init iommu_dma_mode_setup(char *str)
> +{
> + if (!str)
> + goto fail;
> +
> + if (!strncmp(str, "passthrough", 11))
> + iommu_default_dma_mode = IOMMU_DMA_MODE_PASSTHROUGH;
> + else if (!s
On Fri, Apr 12, 2019 at 12:26:13PM +0800, Lu Baolu wrote:
> drivers/iommu/intel-iommu.c | 6 +-
> 1 file changed, 5 insertions(+), 1 deletion(-)
Applied, thanks.
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On Fri, Apr 12, 2019 at 12:13:23PM +0800, Lu Baolu wrote:
> Lu Baolu (3):
> vfio/mdev: Add iommu related member in mdev_device
> vfio/type1: Add domain at(de)taching group helpers
> vfio/type1: Handle different mdev isolation type
Applied, thanks.
From: Joerg Roedel
The exlcusion range limit register needs to contain the
base-address of the last page that is part of the range, as
bits 0-11 of this register are treated as 0xfff by the
hardware for comparisons.
So correctly set the exclusion range in the hardware to the
last page which is _
On 09/04/2019 13:53, Zhen Lei wrote:
Currently the IOMMU dma contains 3 modes: passthrough, lazy, strict. The
passthrough mode bypass the IOMMU, the lazy mode defer the invalidation
of hardware TLBs, and the strict mode invalidate IOMMU hardware TLBs
synchronously. The three modes are mutually ex
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