> the userspace definitely doesn't support T624
This is true, yes. Shouldn't be too hard to backport; if there's still
interest in Midgard 1st/2nd gen, I suppose I can grab hardware and sort
it out...
> You probably want a dma_set_mask_and_coherent() call for your 'real' output
> address size som
On Fri, Mar 29, 2019 at 9:03 AM wrote:
>
> From: Laurentiu Tudor
>
> Add a couple of new APIs to check the probing status of the required
> cpu bound qman and bman portals:
> 'int bman_portals_probed()' and 'int qman_portals_probed()'.
> They return the following values.
> * 1 if qman/bman por
On 01/04/2019 09:24, Neil Armstrong wrote:
On 01/04/2019 09:47, Rob Herring wrote:
This adds the initial driver for panfrost which supports Arm Mali
Midgard and Bifrost family of GPUs. Currently, only the T860 and
T760 Midgard GPUs have been tested.
v2:
- Add GPU reset on job hangs (Tomeu)
- Ad
On 01/04/2019 08:47, Rob Herring wrote:
This adds the initial driver for panfrost which supports Arm Mali
Midgard and Bifrost family of GPUs. Currently, only the T860 and
T760 Midgard GPUs have been tested.
FWIW, on an antique T624 (Juno) it seems to work no worse than the kbase
driver plus pa
On 01/04/2019 08:47, Rob Herring wrote:
ARM Mali midgard GPU is similar to standard 64-bit stage 1 page tables, but
have a few differences. Add a new format type to represent the format. The
input address size is 48-bits and the output address size is 40-bits (and
possibly less?). Note that the l
Rob Herring writes:
> On Mon, Apr 1, 2019 at 8:07 AM Daniel Vetter wrote:
>>
>> On Mon, Apr 1, 2019 at 9:47 AM Rob Herring wrote:
>> >
>> > Similar to the single handle drm_gem_object_lookup(),
>> > drm_gem_objects_lookup() takes an array of handles and returns an array
>> > of GEM objects.
>>
On Mon, Apr 1, 2019 at 8:07 AM Daniel Vetter wrote:
>
> On Mon, Apr 1, 2019 at 9:47 AM Rob Herring wrote:
> >
> > Similar to the single handle drm_gem_object_lookup(),
> > drm_gem_objects_lookup() takes an array of handles and returns an array
> > of GEM objects.
> >
> > Cc: Maarten Lankhorst
>
Rob Herring writes:
> This adds the initial driver for panfrost which supports Arm Mali
> Midgard and Bifrost family of GPUs. Currently, only the T860 and
> T760 Midgard GPUs have been tested.
>
> v2:
> - Add GPU reset on job hangs (Tomeu)
> - Add RuntimePM and devfreq support (Tomeu)
> - Fix T76
Chris Wilson writes:
> Quoting Daniel Vetter (2019-04-01 14:06:48)
>> On Mon, Apr 1, 2019 at 9:47 AM Rob Herring wrote:
>> > +{
>> > + int i, ret = 0;
>> > + struct drm_gem_object *obj;
>> > +
>> > + spin_lock(&filp->table_lock);
>> > +
>> > + for (i = 0; i < count; i++)
Nice job!
Patches 1-2 are Acked-by: Alyssa Rosenzweig
Patch 3 is Reviewed-by: Alyssa Rosenzweig
Excited to see this mainlined!
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Unused at the moment, just future-proofing the DTS.
Signed-off-by: Marc Gonzalez
---
Documentation/devicetree/bindings/iommu/arm,smmu.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
b/Documentation/devicetree/bindings/iommu/arm,smmu.t
The MSM8998 ANOC1(*) SMMU services BLSP2, PCIe, UFS, and USB.
(*) Aggregate Network-on-Chip #1
Based on the following DTS downstream:
https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/msm-arm-smmu-8998.dtsi?h=LE.UM.1.3.r3.25#n18
Signed-off-by: Marc Gonzalez
---
Cha
On 03/21/2019 11:52 PM, Christoph Hellwig wrote:
> gbefb uses managed resources, so it should do the same for DMA
> allocations.
>
> Signed-off-by: Christoph Hellwig
Acked-by: Bartlomiej Zolnierkiewicz
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronic
Still broken in 5.1-rc3.
Tried 5.1-rc1 on a bunch of sparcs, this hits all my sparcs with sun4v and mpt
scsi.
[ 2.733263] Fusion MPT base driver 3.04.20
[ 2.742995] Copyright (c) 1999-2008 LSI Corporation
[ 2.743052] Fusion MPT SAS Host driver 3.04.20
[ 2.743881] mptbase: ioc0: Ini
Quoting Daniel Vetter (2019-04-01 14:06:48)
> On Mon, Apr 1, 2019 at 9:47 AM Rob Herring wrote:
> > +{
> > + int i, ret = 0;
> > + struct drm_gem_object *obj;
> > +
> > + spin_lock(&filp->table_lock);
> > +
> > + for (i = 0; i < count; i++) {
> > + /* Check if
On Mon, Apr 1, 2019 at 9:47 AM Rob Herring wrote:
>
> Similar to the single handle drm_gem_object_lookup(),
> drm_gem_objects_lookup() takes an array of handles and returns an array
> of GEM objects.
>
> Cc: Maarten Lankhorst
> Cc: Maxime Ripard
> Cc: Sean Paul
> Cc: David Airlie
> Cc: Daniel
On 01/04/2019 09:47, Rob Herring wrote:
> This adds the initial driver for panfrost which supports Arm Mali
> Midgard and Bifrost family of GPUs. Currently, only the T860 and
> T760 Midgard GPUs have been tested.
>
> v2:
> - Add GPU reset on job hangs (Tomeu)
> - Add RuntimePM and devfreq support
Hi Leo,
> -Original Message-
> From: Li Yang [mailto:leoyang...@nxp.com]
> Sent: Friday, March 29, 2019 11:16 PM
>
> On Fri, Mar 29, 2019 at 9:03 AM wrote:
> >
> > From: Laurentiu Tudor
> >
> > Add a one-to-one iommu mapping for bman private data memory (FBPR).
> > This is required for
Hi Robin,
> -Original Message-
> From: Robin Murphy [mailto:robin.mur...@arm.com]
> Sent: Friday, March 29, 2019 4:51 PM
>
> On 29/03/2019 14:00, laurentiu.tu...@nxp.com wrote:
> > From: Laurentiu Tudor
> >
> > Add a one-to-one iommu mapping for bman private data memory (FBPR).
> > This
Hi Joakim,
> -Original Message-
> From: Joakim Tjernlund [mailto:joakim.tjernl...@infinera.com]
> Sent: Friday, March 29, 2019 5:25 PM>
>
> Should this one go stable 4.14/4.19 too?
Good point. I also think it makes sense to cc: stable.
---
Best Regards, Laurentiu
> On Fri, 2019-03-29
Hi Leo,
> -Original Message-
> From: Li Yang [mailto:leoyang...@nxp.com]
> Sent: Friday, March 29, 2019 11:50 PM
> To: Laurentiu Tudor
> Cc: Netdev ; Madalin-cristian Bucur
> ; Roy Pledge ; Camelia
> Alexandra Groza ; David Miller
> ; Linux IOMMU ;
> moderated list:ARM/FREESCALE IMX / MXC
Hi Leo,
> -Original Message-
> From: Li Yang [mailto:leoyang...@nxp.com]
> Sent: Saturday, March 30, 2019 12:07 AM
> To: Laurentiu Tudor
> Cc: Netdev ; Madalin-cristian Bucur
> ; Roy Pledge ; Camelia
> Alexandra Groza ; David Miller
> ; Linux IOMMU ;
> moderated list:ARM/FREESCALE IMX / M
Hi Joerg,
On 25/03/2019 14:44, Joerg Roedel wrote:
> Hey Jean-Philippe,
>
> thanks for the patch, I think we are on the finish line with this
> interface. Just one small question below.
>
> On Wed, Mar 20, 2019 at 03:02:58PM +, Jean-Philippe Brucker wrote:
>> +int iommu_sva_set_ops(struct io
On 01/04/2019 07:28, Mukesh Ojha wrote:
On 3/27/2019 1:34 PM, Christoph Hellwig wrote:
Signed-off-by: Christoph Hellwig
Acked-by: Robin Murphy
---
arch/arm64/mm/dma-mapping.c | 15 +--
1 file changed, 1 insertion(+), 14 deletions(-)
diff --git a/arch/arm64/mm/dma-mapping.c b/a
ARM Mali midgard GPU is similar to standard 64-bit stage 1 page tables, but
have a few differences. Add a new format type to represent the format. The
input address size is 48-bits and the output address size is 40-bits (and
possibly less?). Note that the later bifrost GPUs follow the standard
64-b
Here's v2 of the panfrost driver. Lots of improvements from the RFC
primarily with support for job hangs resetting the GPU and runtime-pm
thanks to Tomeu.
Several dependencies have been applied already, but the first 2 patches
are the remaining dependencies. We need to take the iommu change via
dr
Similar to the single handle drm_gem_object_lookup(),
drm_gem_objects_lookup() takes an array of handles and returns an array
of GEM objects.
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: Sean Paul
Cc: David Airlie
Cc: Daniel Vetter
Signed-off-by: Rob Herring
---
drivers/gpu/drm/drm_gem.c | 4
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