Re: [PATCH v1 0/9] Bounce buffer for untrusted devices

Should be titled as "iommu/vt-d: Bounce buffer for untrusted devices". Sorry for the inconvenience. On 3/12/19 1:59 PM, Lu Baolu wrote: An external PCI device is a PCI peripheral device connected to the system through an external bus, such as Thunderbolt. What makes it different is that it can't

[PATCH v1 5/9] iommu/vt-d: Add bounce buffer API for dma sync

This adds the APIs for bounce buffer specified dma sync ops. Cc: Ashok Raj Cc: Jacob Pan Signed-off-by: Lu Baolu Tested-by: Xu Pengfei Tested-by: Mika Westerberg --- drivers/iommu/intel-pgtable.c | 112 ++ include/linux/intel-iommu.h | 6 ++ 2 files change

[PATCH v1 6/9] iommu/vt-d: Check whether device requires bounce buffer

This adds a helper to check whether a device needs to use bounce buffer. It also provides a boot time option to disable the bounce buffer. Users can use this to prevent the iommu driver from using the bounce buffer for performance gain. Cc: Ashok Raj Cc: Jacob Pan Signed-off-by: Lu Baolu Tested

[PATCH v1 7/9] iommu/vt-d: Add dma sync ops for untrusted devices

This adds the dma sync ops for dma buffers used by any untrusted device. We need to sync such buffers because they might have been mapped with bounce pages. Cc: Ashok Raj Cc: Jacob Pan Signed-off-by: Lu Baolu Tested-by: Xu Pengfei Tested-by: Mika Westerberg --- drivers/iommu/intel-iommu.c |

[PATCH v1 9/9] iommu/vt-d: Use bounce buffer for untrusted devices

The Intel VT-d hardware uses paging for DMA remapping. The minimum mapped window is a page size. The device drivers may map buffers not filling the whole IOMMU window. This allows the device to access to possibly unrelated memory and a malicious device could exploit this to perform DMA attacks. To

[PATCH v1 8/9] iommu/vt-d: Flush IOTLB for untrusted device in time

By default, for performance consideration, Intel IOMMU driver won't flush IOTLB immediately after a buffer is unmapped. It schedules a thread and flushes IOTLB in a batched mode. This isn't suitable for untrusted device since it still can access the memory even if it isn't supposed to do so. Cc: A

[PATCH v1 4/9] iommu/vt-d: Add bounce buffer API for domain map/unmap

This adds the APIs for bounce buffer specified domain map() and unmap(). The start and end partial pages will be mapped with bounce buffered pages instead. This will enhance the security of DMA buffer by isolating the DMA attacks from malicious devices. Cc: Ashok Raj Cc: Jacob Pan Signed-off-by:

[PATCH v1 1/9] iommu/vt-d: Add trace events for domain map/unmap

This adds trace support for the Intel IOMMU driver. It also declares some events which could be used to trace the events when an IOVA is being mapped or unmapped in a domain. Cc: Ashok Raj Cc: Jacob Pan Signed-off-by: Mika Westerberg Signed-off-by: Lu Baolu --- drivers/iommu/Makefile

[PATCH v1 3/9] iommu/vt-d: Add address walk helper

This adds a helper to walk a contiguous dma address and divide the address space into possiblely three parts: a start partial page, middle full pages and an end partial page, and call the callback for each part of the address. Cc: Ashok Raj Cc: Jacob Pan Signed-off-by: Lu Baolu Tested-by: Xu Pe

[PATCH v1 2/9] iommu/vt-d: Add helpers for domain mapping/unmapping

This adds two helpers to map or unmap a physically contiguous memory region in the page table of an iommu domain. Cc: Ashok Raj Cc: Jacob Pan Signed-off-by: Lu Baolu Tested-by: Xu Pengfei Tested-by: Mika Westerberg --- drivers/iommu/intel-iommu.c | 35 +++ inc

[PATCH v1 0/9] Bounce buffer for untrusted devices

An external PCI device is a PCI peripheral device connected to the system through an external bus, such as Thunderbolt. What makes it different is that it can't be trusted to the same degree as the devices build into the system. Generally, a trusted PCIe device will DMA into the designated buffers

Re: [PATCH] iommu/amd: Fix a null pointer dereference for ACPI devices

On Fri, Mar 8, 2019 at 12:12 PM Chris Chiu wrote: > > On ASUS laptop X512DK with the realtek USB card reader, the NULL > pointer dereference happens while bringing up the rtsx_usb driver. > > [1.782281] BUG: unable to handle kernel NULL pointer dereference at > 0090 > [1.78228

Re: [PATCH] iommu/amd: fix sg->dma_address for sg->offset bigger than PAGE_SIZE

On Mon, 2019-03-11 at 10:03 +0100, Stanislaw Gruszka wrote: > Take into account that sg->offset can be bigger than PAGE_SIZE when > setting segment sg->dma_address. Otherwise sg->dma_address will point > at diffrent page, what makes DMA not possible with erros like this: > > xhci_hcd :38:00.3:

[PATCH] iommu/amd: fix sg->dma_address for sg->offset bigger than PAGE_SIZE

Take into account that sg->offset can be bigger than PAGE_SIZE when setting segment sg->dma_address. Otherwise sg->dma_address will point at diffrent page, what makes DMA not possible with erros like this: xhci_hcd :38:00.3: AMD-Vi: Event logged [IO_PAGE_FAULT domain=0x address=0x

Re: MT76x2U crashes XHCI driver on AMD Ryzen system

On Sun, Mar 03, 2019 at 11:20:45PM -0800, Rosen Penev wrote: > On Sun, Mar 3, 2019 at 11:10 PM Stanislaw Gruszka wrote: > > > > On Thu, Feb 28, 2019 at 02:40:29PM +0100, Joerg Roedel wrote: > > > On Thu, Feb 28, 2019 at 01:19:48PM +0100, Stanislaw Gruszka wrote: > > > > Nevermind, the patch is wro