On 10/12/2018 3:46 AM, Rob Herring wrote:
On Thu, 11 Oct 2018 15:19:29 +0530, Vivek Gautam wrote:
Qcom's implementation of arm,mmu-500 works well with current
arm-smmu driver implementation. Adding a soc specific compatible
along with arm,mmu-500 makes the bindings future safe.
Signed-off-by
This adds the support to determine the isolation type
of a mediated device group by checking whether it has
an iommu device. If an iommu device exists, an iommu
domain will be allocated and then attached to the iommu
device. Otherwise, keep the same behavior as it is.
Cc: Ashok Raj
Cc: Jacob Pan
This adds helpers to attach or detach a domain to a
group. This will replace iommu_attach_group() which
only works for pci devices.
If a domain is attaching to a group which includes the
mediated devices, it should attach to the iommu device
(a pci device which represents the mdev in iommu scope)
This adds support to return the default pasid associated with
an auxiliary domain. The PCI device which is bound with this
domain should use this value as the pasid for all DMA requests
of the subset of device which is isolated and protected with
this domain.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevi
A parent device might create different types of mediated
devices. For example, a mediated device could be created
by the parent device with full isolation and protection
provided by the IOMMU. One usage case could be found on
Intel platforms where a mediated device is an assignable
subset of a PCI,
Add iommu ops for enabling and disabling multiple domains per
device.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Cc: Liu Yi L
Signed-off-by: Lu Baolu
---
drivers/iommu/intel-iommu.c | 57 +
include/linux/intel-iommu.h | 1 +
2 files changed, 58 insertions
When multiple domains per device has been enabled by the
device driver, the device will tag the default PASID for
the domain to all DMA traffics out of the subset of this
device; and the IOMMU should translate the DMA requests
in PASID granularity.
This extends the intel_iommu_attach/detach_device
Add the response to IOMMU_DEV_ATTR_AUXD_CAPABILITY capability query
through iommu_get_dev_attr().
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Cc: Liu Yi L
Signed-off-by: Lu Baolu
---
drivers/iommu/intel-iommu.c | 38 +
1 file changed, 38 insertions(+)
diff
Hi,
The Mediate Device is a framework for fine-grained physical device
sharing across the isolated domains. Currently the mdev framework
is designed to be independent of the platform IOMMU support. As the
result, the DMA isolation relies on the mdev parent device in a
vendor specific way.
There a
Sharing a physical PCI device in a finer-granularity way
is becoming a consensus in the industry. IOMMU vendors
are also engaging efforts to support such sharing as well
as possible. Among the efforts, the capability of support
finer-granularity DMA isolation is a common requirement
due to the secu
On Thu, 11 Oct 2018 15:19:29 +0530, Vivek Gautam wrote:
> Qcom's implementation of arm,mmu-500 works well with current
> arm-smmu driver implementation. Adding a soc specific compatible
> along with arm,mmu-500 makes the bindings future safe.
>
> Signed-off-by: Vivek Gautam
> ---
>
> Changes sin
On Fri Oct 05 18, Jacob Pan wrote:
On Thu, 4 Oct 2018 13:57:24 -0700
Jerry Snitselaar wrote:
>
>On Tue, Oct 02, 2018 at 10:25:29AM -0700, Jerry Snitselaar wrote:
>> I've been trying to track down a problem where an hp dl380 gen8
>> with a Cavium QLogic BR-1860 Fabric Adapter is getting source-
On 08/10/18 09:02, Christoph Hellwig wrote:
Like all other dma mapping drivers just return an error code instead
of an actual memory buffer. The reason for the overflow buffer was
that at the time swiotlb was invented there was no way to check for
dma mapping errors, but this has long been fixed
On 08/10/18 09:02, Christoph Hellwig wrote:
All properly written drivers now have error handling in the
dma_map_single / dma_map_page callers. As swiotlb_tbl_map_single already
prints a useful warning when running out of swiotlb pool swace we can
also remove swiotlb_full entirely as it serves no
On 08/10/18 09:02, Christoph Hellwig wrote:
I agree there isn't really a good reason for external code to ever be
poking at this, despite it being helpful for arch code trying to hack
around awful coherency issues ;)
Reviewed-by: Robin Murphy
Signed-off-by: Christoph Hellwig
---
include
On 08/10/18 09:02, Christoph Hellwig wrote:
This comments describes an aspect of the map_sg interface that isn't
even exploited by swiotlb.
Reviewed-by: Robin Murphy
Signed-off-by: Christoph Hellwig
---
kernel/dma/swiotlb.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/kernel/
The original motivation for iommu_map_sg() was to give IOMMU drivers the
chance to map an IOVA-contiguous scatterlist as efficiently as they
could. It turns out that there isn't really much driver-specific
business involved there, so now that the default implementation is
mandatory let's just impro
Hi Will,
On 10/10/2018 08:08 PM, Will Deacon wrote:
> On Wed, Oct 10, 2018 at 05:44:07PM +0300, Stanimir Varbanov wrote:
>> Call iommu client translation fault handler(s).
>>
>> Signed-off-by: Stanimir Varbanov
>> ---
>> drivers/iommu/arm-smmu.c | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>>
Add device node for arm,mmu-500 available on sdm845.
This MMU-500 with single TCU and multiple TBU architecture
is shared among all the peripherals except gpu.
Signed-off-by: Vivek Gautam
---
Changes since v3:
- none.
arch/arm64/boot/dts/qcom/sdm845.dtsi | 72 +
Qcom's implementation of arm,mmu-500 works well with current
arm-smmu driver implementation. Adding a soc specific compatible
along with arm,mmu-500 makes the bindings future safe.
Signed-off-by: Vivek Gautam
---
Changes since v3:
- Refined language more to state things directly for the binding
This series enables apps-smmu, the "arm,mmu-500" instance
on sdm845.
Series tested on SDM845 MTP device with related smmu patch series [1],
and necessary config change, besides one hack to keep LDO14 in LPM mode
to boot things up (see the commit in the test branch).
The tested branch is available a
This series enables apps-smmu, the "arm,mmu-500" instance
on sdm845.
Changes since v3:
- Refined the dt binding documentation more to align with
Rob's comments for qcom,smmu-v2 binding documentation [1]
on SoC specific compatibles and state things similar
to qcom,smmu-v2 [2].
Changes si
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