Hi Robin,
On Tue, Dec 19, 2017 at 04:34:46PM +, Robin Murphy wrote:
> Hi Tomasz,
>
> On 19/12/17 15:13, Tomasz Nowicki wrote:
> >Here is my lspci output of ThunderX2 for which I am observing kernel panic
> >coming from
> >SMMUv3 driver -> arm_smmu_write_strtab_ent() -> BUG_ON(ste_live):
> >
>
Implement the newly added IOTLB flushing interface for AMD IOMMU.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd_iommu.c | 73 -
drivers/iommu/amd_iommu_init.c | 7
drivers/iommu/amd_iommu_types.h | 7
3 files changed, 86 ins
VFIO IOMMU type1 currently upmaps IOVA pages synchronously, which requires
IOTLB flushing for every unmapping. This results in large IOTLB flushing
overhead when handling pass-through devices has a large number of mapped
IOVAs.
This can be avoided by using the new IOTLB flushing interface.
Cc: Al
From: Suravee Suthikulpanit
Currently, when pass-through dGPU to a guest VM, there are thousands
of IOTLB flush commands sent from IOMMU to end-point-device. This cause
performance issue when launching new VMs, and could cause IOTLB invalidate
time-out issue on certain dGPUs.
This can be avoided