In case of error, the function iommu_group_alloc() returns ERR_PTR() and
never returns NULL. The NULL test in the return value check should be
replaced with IS_ERR().
Fixes: 7f4c9176f760 ("iommu/tegra: Allow devices to be grouped")
Signed-off-by: Wei Yongjun
---
drivers/iommu/tegra-smmu.c | 2 +-
On Tue, 2017-12-19 at 23:25 +0200, Andy Shevchenko wrote:
>
> Perhaps you need to switch to SPDX license pointer.
> I dunno if Thomas' patch with documentation how to do this made
> upstream
> / linux-next yet.
>
Thanks. I found the information at https://patchwork.kernel.org/patch/1
0091607/.
On Tue, 2017-12-19 at 23:30 +0200, Andy Shevchenko wrote:
> On Tue, 2017-12-19 at 13:08 -0800, Sohil Mehta wrote:
> >
> > Debugfs extension for Intel IOMMU to dump Interrupt remapping table
> > entries for Interrupt remapping and Interrupt posting.
> >
> > The file /sys/kernel/debug/intel_iommu/
The AMD IOMMU specification Rev 3.00 (December 2016) introduces a
new Enhanced PPR Handling Support (EPHSup) bit in the MMIO register
offset 0030h (IOMMU Extended Feature Register).
When EPHSup=1, the IOMMU hardware requires the PPR bit of the
device table entry (DTE) to be set in order to support
On Tue, 2017-12-19 at 13:08 -0800, Sohil Mehta wrote:
> Debugfs extension for Intel IOMMU to dump Interrupt remapping table
> entries for Interrupt remapping and Interrupt posting.
>
> The file /sys/kernel/debug/intel_iommu/ir_translation_struct provides
> detailed information, such as Index, Sour
On Tue, 2017-12-19 at 13:08 -0800, Sohil Mehta wrote:
> Hi All,
>
> This series aims to add debugfs support for Intel IOMMU. It exposes
> IOMMU
> registers, internal context and dumps individual table entries to help
> debug
> Intel IOMMUs.
>
> The first patch does the ground work for the followi
From: Gayatri Kammela
Enable Intel IOMMU debug to export Intel IOMMU internals in debugfs
Cc: Sohil Mehta
Cc: Fenghua Yu
Cc: Ashok Raj
Signed-off-by: Jacob Pan
Signed-off-by: Gayatri Kammela
---
v4: No change
v3: No change
v2: No change
drivers/iommu/Kconfig | 10 ++
driv
From: Gayatri Kammela
Debugfs extension to dump all the register contents for each IOMMU
device to the user space via debugfs.
example:
root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/iommu_regset
DMAR: dmar1: reg_base_addr fed9
Name Offset Contents
VER 0x00
From: Gayatri Kammela
IOMMU internals states such as root and context can be exported to the
userspace.
Example of such dump in Kabylake:
root@OTC-KBLH-01:~# cat
/sys/kernel/debug/intel_iommu/dmar_translation_struct
IOMMU dmar0: Extended Root Table Addr:402b9e800
Extended Root table entries:
B
Debugfs extension for Intel IOMMU to dump Interrupt remapping table
entries for Interrupt remapping and Interrupt posting.
The file /sys/kernel/debug/intel_iommu/ir_translation_struct provides
detailed information, such as Index, Source Id, Destination Id, Vector
and the raw values for entries wit
From: Gayatri Kammela
Debugfs extension to dump the internals such as pasid table entries for
each IOMMU to the userspace.
Example of such dump in Kabylake:
root@OTC-KBLH-01:~# cat
/sys/kernel/debug/intel_iommu/dmar_translation_struct
IOMMU dmar0: Extended Root Table Addr:402b9e800
Extended Ro
Hi All,
This series aims to add debugfs support for Intel IOMMU. It exposes IOMMU
registers, internal context and dumps individual table entries to help debug
Intel IOMMUs.
The first patch does the ground work for the following patches by creating a
new Kconfig option - INTEL_IOMMU_DEBUG. It also
On Tue, 19 Dec 2017 16:20:21 +0100
Tomasz Nowicki wrote:
> While iterating over DMA aliases for a PCI device, for some rare cases
> (i.e. PCIe-to-PCI/X bridges) we may get exactly the same ID as initial child
> device. In turn, the same ID may get registered for a device multiple times.
> Eventua
Hi Tomasz,
On 19/12/17 15:13, Tomasz Nowicki wrote:
Here is my lspci output of ThunderX2 for which I am observing kernel panic
coming from
SMMUv3 driver -> arm_smmu_write_strtab_ent() -> BUG_ON(ste_live):
# lspci -vt
-[:00]-+-00.0-[01-1f]--+ [...]
+ [...]
While iterating over DMA aliases for a PCI device, for some rare cases
(i.e. PCIe-to-PCI/X bridges) we may get exactly the same ID as initial child
device. In turn, the same ID may get registered for a device multiple times.
Eventually IOMMU driver may try to configure the same ID within domain
mu
Here is my lspci output of ThunderX2 for which I am observing kernel panic
coming from
SMMUv3 driver -> arm_smmu_write_strtab_ent() -> BUG_ON(ste_live):
# lspci -vt
-[:00]-+-00.0-[01-1f]--+ [...]
+ [...]
\-00.0-[1e-1f]00.0-[1f]00.0
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