From: Gayatri Kammela
IOMMU internals states such as root and context can be exported to the
userspace.
Example of such dump in Kabylake:
root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/intel_iommu_ctx
IOMMU dmar2:Root Table Addr:4558a3000
Root tbl entries:
Bus 0 L: 4558aa001 H: 0
Debugfs extension for Intel IOMMU to dump Interrupt remapping table
entries for Interrupt remapping and Interrupt posting.
The file /sys/kernel/debug/intel_iommu/intel_iommu_interrupt_remap
provides detailed information, such as Index, Source Id, Destination Id,
Vector and the raw values for entri
From: Gayatri Kammela
Debugfs extension to dump all the register contents for each IOMMU
device to the user space via debugfs.
example:
root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/intel_iommu_regset
DMAR: dmar1: reg_base_addr fed9
Name Offset Contents
VER 0x00
From: Gayatri Kammela
Debugfs extension to dump internals such as extended context table
entries for each IOMMU to the userspace.
root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/intel_iommu_ctx
IOMMU dmar1: Extended Root Table Addr:4558a1800
Extended Root tbl entries:
Bus 0 L: 4558a6001 H
From: Gayatri Kammela
Debugfs extension to dump the internals such as pasid table entries for
each IOMMU to the userspace.
Example of such dump in Kabylake:
root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/intel_iommu_ctx
IOMMU dmar0: Extended Root Table Addr:4310c4800
Extended Root tbl e
From: Gayatri Kammela
Enable Intel IOMMU debug to export Intel IOMMU internals in debugfs
Cc: Sohil Mehta
Cc: Fenghua Yu
Cc: Ashok Raj
Signed-off-by: Jacob Pan
Signed-off-by: Gayatri Kammela
---
drivers/iommu/Kconfig | 10 ++
drivers/iommu/intel-iommu.c | 31 +++--
Hi all,
This series aims to add debugfs support for Intel IOMMU. It exposes IOMMU
registers, internal context and dumps individual table entries to help debug
Intel IOMMUs.
The first patch does the ground work for the following patches by creating a new
Kconfig option - INTEL_IOMMU_DEBUG. It also
On Thu, Oct 12, 2017 at 2:04 PM, Robin Murphy wrote:
> [+DMA API maintainers]
>
> On 11/10/17 23:34, Jim Quinlan wrote:
>> The Broadcom STB PCIe host controller is intimately related to the
>> memory subsystem. This close relationship adds complexity to how cpu
>> system memory is mapped to PCIe
[+DMA API maintainers]
On 11/10/17 23:34, Jim Quinlan wrote:
> The Broadcom STB PCIe host controller is intimately related to the
> memory subsystem. This close relationship adds complexity to how cpu
> system memory is mapped to PCIe memory. Ideally, this mapping is an
> identity mapping, or an
On Thu, 12 Oct 2017 11:12:46 +
"Liu, Yi L" wrote:
> > From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> > Sent: Friday, October 6, 2017 7:04 AM
> > To: iommu@lists.linux-foundation.org; LKML
> > ; Joerg Roedel ;
> > David Woodhouse ; Greg Kroah-Hartman
> > ; Wysocki, Rafael J
> > ; Jea
We do not want the common dma_configure() pathway to apply
indiscriminately to all devices, since there are plenty of buses which
do not have DMA capability, and if their child devices were used for
DMA API calls it would only be indicative of a driver bug. However,
there are a number of buses for
On Thu, Oct 12, 2017 at 01:55:32PM +0100, Jean-Philippe Brucker wrote:
> On 12/10/17 13:05, Yisheng Xie wrote:
> [...]
> * An iommu_process can be bound to multiple domains, and a domain can
> have
> multiple iommu_process.
> >>> when bind a task to device, can we create a single
On Thu, Oct 12, 2017 at 08:31:31PM +0800, Wei Hu (Xavier) wrote:
>
>
> On 2017/10/1 0:10, Leon Romanovsky wrote:
> > On Sat, Sep 30, 2017 at 05:28:59PM +0800, Wei Hu (Xavier) wrote:
> > > If the IOMMU is enabled, the length of sg obtained from
> > > __iommu_map_sg_attrs is not 4kB. When the IOVA is
On 10.10.2017 12:53, Joerg Roedel wrote:
> On Wed, Oct 04, 2017 at 04:02:31AM +0300, Dmitry Osipenko wrote:
>> Due to a bug in IOVA allocator, page mapping could accidentally overwritten.
>> We can catch this case by checking 'VALID' bit of GART's page entry prior to
>> mapping of a page. Since tha
On 12/10/17 13:31, Wei Hu (Xavier) wrote:
>
>
> On 2017/10/1 0:10, Leon Romanovsky wrote:
>> On Sat, Sep 30, 2017 at 05:28:59PM +0800, Wei Hu (Xavier) wrote:
>>> If the IOMMU is enabled, the length of sg obtained from
>>> __iommu_map_sg_attrs is not 4kB. When the IOVA is set with the sg
>>> dma a
On 12/10/17 13:05, Yisheng Xie wrote:
[...]
* An iommu_process can be bound to multiple domains, and a domain can have
multiple iommu_process.
>>> when bind a task to device, can we create a single domain for it? I am
>>> thinking
>>> about process management without shared PT(for some
On 2017/10/1 0:10, Leon Romanovsky wrote:
On Sat, Sep 30, 2017 at 05:28:59PM +0800, Wei Hu (Xavier) wrote:
If the IOMMU is enabled, the length of sg obtained from
__iommu_map_sg_attrs is not 4kB. When the IOVA is set with the sg
dma address, the IOVA will not be page continuous. and the VA
ret
Hi Jean-Philippe,
On Thu, Oct 12, 2017 at 12:13:20PM +0100, Jean-Philippe Brucker wrote:
> On 11/10/17 12:33, Joerg Roedel wrote:
> > Here is how I think the base API should look like:
> >
> > * iommu_iovm_device_init(struct device *dev);
> > iommu_iovm_device_shutdown(struct device *de
On Thu, Oct 12, 2017 at 12:14:08PM +0100, Robin Murphy wrote:
> Yup, I've had Tomasz' patch included in my iommu/iova branch for a
> while, and the "Misc. IOVA tweaks" patches were actually written on top
> of it.
>
> This should be the final piece of the puzzle for several arm64 server
> platform
Hi Jean,
Thanks for replying.
On 2017/10/9 19:36, Jean-Philippe Brucker wrote:
> Hi,
>
> On 09/10/17 10:49, Yisheng Xie wrote:
>> Hi Jean,
>>
>> On 2017/10/6 21:31, Jean-Philippe Brucker wrote:
>>> Following discussions at plumbers and elsewhere, it seems like we need to
>>> unify some of the Sha
On 12/10/17 11:08, Tomasz Nowicki wrote:
> Hi Joerg,
>
> On 12.10.2017 12:04, Joerg Roedel wrote:
>> Hi Tomasz,
>>
>> On Thu, Oct 12, 2017 at 11:40:27AM +0200, Tomasz Nowicki wrote:
>>> Can you please have a look and see if you are fine with this patch?
>>
>> How do these changes relate to Robin's
> From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> Sent: Friday, October 6, 2017 7:04 AM
> To: iommu@lists.linux-foundation.org; LKML ;
> Joerg
> Roedel ; David Woodhouse ; Greg
> Kroah-Hartman ; Wysocki, Rafael J
> ; Jean-Philippe Brucker philippe.bruc...@arm.com>
> Cc: Liu, Yi L ; Lan,
Hi Joerg,
On 11/10/17 12:33, Joerg Roedel wrote:
> Hi Jean-Philipe,
>
> Thanks for your patches, this is definitly a step in the right direction
> to get generic support for IO virtual memory into the IOMMU core code.
>
> But I see an issue with the design around task_struct, please see
> below.
> -Original Message-
> From: Bob Liu [mailto:liub...@huawei.com]
> Sent: Thursday, October 12, 2017 6:08 PM
> To: Liu, Yi L ; Jean-Philippe Brucker philippe.bruc...@arm.com>; Joerg Roedel
> Cc: Lan, Tianyu ; Liu, Yi L ;
> Greg
> Kroah-Hartman ; Wysocki, Rafael J
> ; LKML ;
> iommu@lists
On 12/10/17 11:07, Bob Liu wrote:
> On 2017/10/12 17:50, Liu, Yi L wrote:
>>
>>
>>> -Original Message-
>>> From: Bob Liu [mailto:liub...@huawei.com]
>>> Sent: Thursday, October 12, 2017 5:39 PM
>>> To: Jean-Philippe Brucker ; Joerg Roedel
>>> ; Liu, Yi L
>>> Cc: Lan, Tianyu ; Liu, Yi L
>>
On 2017/10/12 17:50, Liu, Yi L wrote:
>
>
>> -Original Message-
>> From: Bob Liu [mailto:liub...@huawei.com]
>> Sent: Thursday, October 12, 2017 5:39 PM
>> To: Jean-Philippe Brucker ; Joerg Roedel
>> ; Liu, Yi L
>> Cc: Lan, Tianyu ; Liu, Yi L
>> ; Greg
>> Kroah-Hartman ; Wysocki, Rafael
Hi Joerg,
On 12.10.2017 12:04, Joerg Roedel wrote:
Hi Tomasz,
On Thu, Oct 12, 2017 at 11:40:27AM +0200, Tomasz Nowicki wrote:
Can you please have a look and see if you are fine with this patch?
How do these changes relate to Robin's IOVA optimizations already in the
iommu-tree?
This is an
Hi Tomasz,
On Thu, Oct 12, 2017 at 11:40:27AM +0200, Tomasz Nowicki wrote:
> Can you please have a look and see if you are fine with this patch?
How do these changes relate to Robin's IOVA optimizations already in the
iommu-tree?
Regards,
Joerg
_
> -Original Message-
> From: Bob Liu [mailto:liub...@huawei.com]
> Sent: Thursday, October 12, 2017 5:39 PM
> To: Jean-Philippe Brucker ; Joerg Roedel
> ; Liu, Yi L
> Cc: Lan, Tianyu ; Liu, Yi L ;
> Greg
> Kroah-Hartman ; Wysocki, Rafael J
> ; LKML ;
> iommu@lists.linux-foundation.org;
On 2017/10/11 20:48, Jean-Philippe Brucker wrote:
> On 11/10/17 13:15, Joerg Roedel wrote:
>> On Wed, Oct 11, 2017 at 11:54:52AM +, Liu, Yi L wrote:
>>> I didn't quite get 'iovm' mean. Can you explain a bit about the idea?
>>
>> It's short for IO Virtual Memory, basically a replacement term for
Hi Joerg,
Can you please have a look and see if you are fine with this patch?
Thanks in advance,
Tomasz
On 20.09.2017 10:52, Tomasz Nowicki wrote:
Here is my test setup where I have stareted performance measurements.
PCIe - TX - PCIe -
| Thun
Hi Joerg,
Can you please have a look and see if you are fine with this patch?
Thanks in advance,
Tomasz
On 20.09.2017 10:52, Tomasz Nowicki wrote:
Here is my test setup where I have stareted performance measurements.
PCIe - TX - PCIe -
| Thun
On Wed, Oct 11, 2017 at 01:48:00PM +0100, Jean-Philippe Brucker wrote:
> I wonder if SVM originated in OpenCL first, rather than intel? That's why
> I'm using it, but it is ambiguous. I'm not sure IOVM is precise enough
> though, since the name could as well be used without shared tables, for
> cla
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