RE: [RFC] virtio-iommu version 0.4

2017-09-12 Thread Bharat Bhushan
Hi Eric, > -Original Message- > From: Auger Eric [mailto:eric.au...@redhat.com] > Sent: Tuesday, September 12, 2017 10:43 PM > To: Jean-Philippe Brucker ; > iommu@lists.linux-foundation.org; k...@vger.kernel.org; > virtualizat...@lists.linux-foundation.org; virtio-...@lists.oasis-open.org

Re: [RFC PATCH 6/6] iommu/arm-smmu-v3: Avoid ILLEGAL setting of STE.S1STALLD and CD.S

2017-09-12 Thread Will Deacon
On Tue, Sep 05, 2017 at 01:54:19PM +0100, Jean-Philippe Brucker wrote: > On 31/08/17 09:20, Yisheng Xie wrote: > > It is ILLEGAL to set STE.S1STALLD if STALL_MODEL is not 0b00, which > > means we should not disable stall mode if stall/terminate mode is not > > configuable. > > > > Meanwhile, it is

Re: VFIO on ARM64

2017-09-12 Thread Jean-Philippe Brucker
Hi Valmiki, On 12/09/17 19:01, valmiki wrote: > Hi, as per VFIO documentation i see that we need to see > "/sys/bus/pci/devices/:06:0d.0/iommu_group" in order to find group > in which PCI bus is attached. > But as per drivers/pci/pci-sysfs.c in static struct attribute > *pci_dev_attrs[], i don

Re: [RFC PATCH 0/6] Add platform device SVM support for ARM SMMUv3

2017-09-12 Thread Bob Liu
On 2017/9/6 17:57, Jean-Philippe Brucker wrote: > On 06/09/17 02:02, Bob Liu wrote: >> On 2017/9/5 20:56, Jean-Philippe Brucker wrote: >>> On 31/08/17 09:20, Yisheng Xie wrote: Jean-Philippe has post a patchset for Adding PCIe SVM support to ARM SMMUv3: https://www.spinics.net/lists

[PATCH] iommu: dmar: fix harmless section mismatch warning

2017-09-12 Thread Arnd Bergmann
Building with gcc-4.6 results in this warning due to dmar_table_print_dmar_entry being inlined as in newer compiler versions: WARNING: vmlinux.o(.text+0x5c8bee): Section mismatch in reference from the function dmar_walk_remapping_entries() to the function .init.text:dmar_table_print_dmar_entry()

Re: VFIO on ARM64

2017-09-12 Thread Alex Williamson
[Cc +Eric Auger] On Tue, 12 Sep 2017 23:31:00 +0530 valmiki wrote: > Hi, as per VFIO documentation i see that we need to see > "/sys/bus/pci/devices/:06:0d.0/iommu_group" in order to find group > in which PCI bus is attached. > But as per drivers/pci/pci-sysfs.c in static struct attribute

VFIO on ARM64

2017-09-12 Thread valmiki
Hi, as per VFIO documentation i see that we need to see "/sys/bus/pci/devices/:06:0d.0/iommu_group" in order to find group in which PCI bus is attached. But as per drivers/pci/pci-sysfs.c in static struct attribute *pci_dev_attrs[], i don't see any such attribute. I tried enabling SMMUv2 dri

Re: [RFC] virtio-iommu version 0.4

2017-09-12 Thread Auger Eric
Hi jean, On 04/08/2017 20:19, Jean-Philippe Brucker wrote: > This is the continuation of my proposal for virtio-iommu, the para- > virtualized IOMMU. Here is a summary of the changes since last time [1]: > > * The virtio-iommu document now resembles an actual specification. It is > split into a

[PATCH v2 1/3] iommu/arm-smmu-v3: put off the execution of TLBI* to reduce lock confliction

2017-09-12 Thread Zhen Lei
Because all TLBI commands should be followed by a SYNC command, to make sure that it has been completely finished. So we can just add the TLBI commands into the queue, and put off the execution until meet SYNC or other commands. To prevent the followed SYNC command waiting for a long time because o

[PATCH v2 3/3] iommu/arm-smmu: add support for unmap a memory range with only one tlb sync

2017-09-12 Thread Zhen Lei
This patch is base on: (add02cfdc9bc2 "iommu: Introduce Interface for IOMMU TLB Flushing") Because iotlb_sync is moved out of ".unmap = arm_smmu_unmap", some interval ".unmap" calls should explicitly followed by a iotlb_sync operation. Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu.c

[PATCH v2 2/3] iommu/arm-smmu-v3: add support for unmap an iova range with only one tlb sync

2017-09-12 Thread Zhen Lei
This patch is base on: (add02cfdc9bc2 "iommu: Introduce Interface for IOMMU TLB Flushing") Because iotlb_sync is moved out of ".unmap = arm_smmu_unmap", some interval ".unmap" calls should explicitly followed by a iotlb_sync operation. Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu-v3.c

[PATCH v2 0/3] arm-smmu: performance optimization

2017-09-12 Thread Zhen Lei
v1 -> v2: base on (add02cfdc9bc2 "iommu: Introduce Interface for IOMMU TLB Flushing") Zhen Lei (3): iommu/arm-smmu-v3: put off the execution of TLBI* to reduce lock confliction iommu/arm-smmu-v3: add support for unmap an iova range with only one tlb sync iommu/arm-smmu: add support f

[RFC PATCH 1/1] iommu/arm-smmu: Add support for multiple TBU child devices

2017-09-12 Thread Vivek Gautam
ARM MMU-500 implements a TBU (uTLB) for each connected master besides a single TCU which controls and manages the address translations. Each of these TBUs can either be in the same power domain as the master, or they can have a independent power switch. This design addresses the challenges to contr

Re: [v4,0/3] iommu/ipmmu-vmsa: r8a7796 support V4

2017-09-12 Thread Oleksandr
Hi, all. Gentle reminder. On 05.09.17 19:52, Oleksandr wrote: Hi, Magnus, maintainers, all. On 19.06.17 14:04, Magnus Damm wrote: iommu/ipmmu-vmsa: r8a7796 support V4 [PATCH v4 1/3] iommu/ipmmu-vmsa: Add r8a7796 DT binding [PATCH v4 2/3] iommu/ipmmu-vmsa: Increase maximum micro-TLBS to 48

RE: [PATCH] iommu/amd: flush IOTLB for specific domains only (v3)

2017-09-12 Thread Nath, Arindam
Hi Daniel, >-Original Message- >From: Daniel Drake [mailto:dr...@endlessm.com] >Sent: Tuesday, September 12, 2017 12:20 PM >To: Nath, Arindam >Cc: Joerg Roedel ; Lendacky, Thomas >; iommu@lists.linux-foundation.org; amd- >g...@lists.freedesktop.org; Deucher, Alexander >; Bridgman, John >;