> -Original Message-
> From: Stuart Yoder
> Sent: Friday, October 28, 2016 12:12 PM
> To: 'Robin Murphy' ; Mark Rutland
> Cc: linux-arm-ker...@lists.infradead.org; Will Deacon ;
> Diana Madalina Craciun
> ; Nipun Gupta ;
> iommu@lists.linux-foundation.org
> Subject: RE: SMR masking and
Hi,
On Fri, Oct 28, 2016 at 05:16:37PM +0100, Robin Murphy wrote:
> On 27/10/16 18:10, Stuart Yoder wrote:
> > A question about how the SMR masking defined in the arm,smmu binding
> > relates to the PCI iommu-map.
> >
> > The #iommu-cells property defines the number of cells an "IOMMU specifier"
> -Original Message-
> From: Robin Murphy [mailto:robin.mur...@arm.com]
> Sent: Friday, October 28, 2016 11:17 AM
> To: Stuart Yoder ; Mark Rutland
> Cc: linux-arm-ker...@lists.infradead.org; Will Deacon ;
> Diana Madalina Craciun
> ; Nipun Gupta ;
> iommu@lists.linux-foundation.org
>
Hi Stuart,
On 27/10/16 18:10, Stuart Yoder wrote:
> Hi Robin,
>
> A question about how the SMR masking defined in the arm,smmu binding
> relates to the PCI iommu-map.
>
> The #iommu-cells property defines the number of cells an "IOMMU specifier"
> takes and 2 is specified to be:
>
>SMMUs wi
Hi Joerg,
Please pull the following pair of fixes from Robin for the ARM SMMU
drivers.
Thanks,
Will
--->8
The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
are available in the git repository at:
git://git.kernel.org/p
On Tue, Oct 18, 2016 at 05:04:07PM +0100, Lorenzo Pieralisi wrote:
> In ARM ACPI systems, IOMMU components are specified through static
> IORT table entries. In order to create platform devices for the
> corresponding ARM SMMU components, IORT kernel code should be made
> able to parse IORT table e
We've been seeing a pretty frequent crash/hang that seems to be pointing
at the Intel IOMMU code.
This manifests in one of two ways:
1) Kernel reports a BUG, then the system hangs
2) Kernel reports a BUG, then the kernel notices something else terrible
has occurred, and triggers a reboot.
Ex
On Friday, October 28, 2016 2:50:11 PM CEST Yangbo Lu wrote:
> This patchset is used to fix a host version register bug in the
> T4240-R1.0-R2.0
> eSDHC controller. To match the SoC version and revision, 10 previous version
> patchsets had tried many methods but all of them were rejected by review
On Friday, October 28, 2016 2:50:14 PM CEST Yangbo Lu wrote:
> Move mpc85xx.h to include/linux/fsl and rename it to svr.h as a common
> header file. This SVR numberspace is used on some ARM chips as well as
> PPC, and even to check for a PPC SVR multi-arch drivers would otherwise
> need to ifdef t
On Friday, October 28, 2016 2:50:17 PM CEST Yangbo Lu wrote:
> +
> +static int soc_device_match_one(struct device *dev, void *arg)
> +{
> + struct soc_device *soc_dev = container_of(dev, struct soc_device,
> dev);
> + const struct soc_device_attribute *match = arg;
> +
> + if (ma
> -Original Message-
> From: Y.B. Lu
> Sent: Friday, October 28, 2016 2:06 PM
> To: Y.B. Lu; 'Scott Wood'; 'linux-...@vger.kernel.org';
> 'ulf.hans...@linaro.org'; 'Arnd Bergmann'
> Cc: 'linuxppc-...@lists.ozlabs.org'; 'devicet...@vger.kernel.org';
> 'linux-arm-ker...@lists.infradead.org';
Move mpc85xx.h to include/linux/fsl and rename it to svr.h as a common
header file. This SVR numberspace is used on some ARM chips as well as
PPC, and even to check for a PPC SVR multi-arch drivers would otherwise
need to ifdef the header inclusion and all references to the SVR symbols.
Signed-of
The global utilities block controls power management, I/O device
enabling, power-onreset(POR) configuration monitoring, alternate
function selection for multiplexed signals,and clock control.
This patch adds a driver to manage and access global utilities block.
Initially only reading SVR and regis
From: Arnd Bergmann
We keep running into cases where device drivers want to know the exact
version of the a SoC they are currently running on. In the past, this has
usually been done through a vendor specific API that can be called by a
driver, or by directly accessing some kind of version regist
The eSDHC of T4240-R1.0-R2.0 has incorrect vender version and spec version.
Acturally the right version numbers should be VVN=0x13 and SVN = 0x1.
This patch adds the GUTS driver support for eSDHC driver to match SoC.
And fix host version to avoid that incorrect version numbers break down
the ADMA d
Add maintainer entry for Freescale SoC drivers including
the QE library and the GUTS driver now. Also add maintainer
for QE library.
Signed-off-by: Yangbo Lu
Acked-by: Scott Wood
Acked-by: Qiang Zhao
---
Changes for v8:
- Added this patch
Changes for v9:
- Added linux-arm mail l
Add the dts node for device configuration unit that provides
general purpose configuration and status for the device.
Signed-off-by: Yangbo Lu
Acked-by: Scott Wood
---
Changes for v5:
- Added this patch
Changes for v6:
- None
Changes for v7:
- None
Changes for v8:
This patchset is used to fix a host version register bug in the T4240-R1.0-R2.0
eSDHC controller. To match the SoC version and revision, 10 previous version
patchsets had tried many methods but all of them were rejected by reviewers.
Such as
- dts compatible method
- syscon method
Move guts devicetree doc to Documentation/devicetree/bindings/soc/fsl/
since it's used by not only PowerPC but also ARM. And add a specification
for 'little-endian' property.
Signed-off-by: Yangbo Lu
Acked-by: Rob Herring
Acked-by: Scott Wood
---
Changes for v4:
- Added this patch
Chang
19 matches
Mail list logo
