From: Baoquan HE
If not valid just skip reserving the old domain id.
Signed-off-by: Baoquan He
---
drivers/iommu/amd_iommu.c | 4
drivers/iommu/amd_iommu_init.c | 5 +++--
drivers/iommu/amd_iommu_types.h | 5 +
3 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/driv
Add function copy_dev_tables to copy old DTE of the 1st kernel to
the new DTE table. Since all iommu share the same DTE table the
copy only need be done once as long as the physical address of
old DTE table is retrieved from iommu reg. Besides the old domain
id occupied in 1st kernel need be reserv
From: Baoquan HE
The init should have been done in normal kernel, skip it in kdump
kernel. And clean up the function comments.
Signed-off-by: Baoquan He
---
drivers/iommu/amd_iommu_init.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/amd_iommu_init.
From: Baoquan HE
This can make later kdump change easier.
Signed-off-by: Baoquan He
---
drivers/iommu/amd_iommu_init.c | 24 ++--
1 file changed, 14 insertions(+), 10 deletions(-)
diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
index 9e1dfcb..9
From: Baoquan HE
Here several things need be done:
1) Initialize amd_iommu_dev_table because it was set several times
since kdump kernel reboot. We don't need the set because we will
copy the content from old kernel.
2) Re-enable event/cmd buffer
3) Install the DTE table to reg
4) Flush all
In amd-vi spec several bits of IO PTE fields and DTE fields are similar
so that both of them can share the same MACRO definition. However
defining their respecitve bit fields can make code more read-able. So
do it in this patch.
Signed-off-by: Baoquan He
---
drivers/iommu/amd_iommu.c | 10
Add functions to check whether translation is already enabled in IOMMU.
Signed-off-by: Baoquan He
---
drivers/iommu/amd_iommu_init.c | 25 +
drivers/iommu/amd_iommu_types.h | 4
2 files changed, 29 insertions(+)
diff --git a/drivers/iommu/amd_iommu_init.c b/driver
It will be more readable then the old setting.
Signed-off-by: Baoquan He
---
drivers/iommu/amd_iommu.c | 2 +-
drivers/iommu/amd_iommu_init.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index 9ec7cad..cc636e6
Hi Joerg,
Recently I have time to continue the work of fixing AMD IOMMU faults in
kdump kernel. The situation is I tried to make change at the time point
as Intel iommu has done, but still Ethernet NIC will trigger the printing
of IO_PAGE_FAULT. I got 2 machines with AMD IOMMU v1 and v2 separately
Change it as it's designed for and keep it consistent with other
places.
Signed-off-by: Baoquan He
---
drivers/iommu/amd_iommu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index 5efadad..9ec7cad 100644
--- a/drivers
On 2016/5/25 4:55, Bjorn Helgaas wrote:
On Wed, Apr 27, 2016 at 08:43:26PM +0800, Yongji Xie wrote:
We introduce a new pci_bus_flags, PCI_BUS_FLAGS_MSI_REMAP
which indicates all devices on the bus are protected by the
hardware which supports IRQ remapping(intel naming).
This changelog is ambig
On 2016/5/25 5:11, Bjorn Helgaas wrote:
On Wed, Apr 27, 2016 at 08:43:27PM +0800, Yongji Xie wrote:
The capability of IRQ remapping is abstracted on IOMMU side on
some archs. There is a existing flag IOMMU_CAP_INTR_REMAP for this.
To have a universal flag to test this capability for different
Hi, Joerg
Not sure whether you think this calculation is correct.
If I missed something for this " + 1" in your formula, I am glad to hear your
explanation. So that I could learn something from you :-)
Have a good day~
On Sat, May 21, 2016 at 02:41:51AM +, Wei Yang wrote:
>In commit <8bf478
On Wed, Apr 27, 2016 at 08:43:27PM +0800, Yongji Xie wrote:
> The capability of IRQ remapping is abstracted on IOMMU side on
> some archs. There is a existing flag IOMMU_CAP_INTR_REMAP for this.
>
> To have a universal flag to test this capability for different
> archs on PCI side, we set PCI_BUS_
On Wed, Apr 27, 2016 at 08:43:28PM +0800, Yongji Xie wrote:
> On ARM HW the capability of IRQ remapping is abstracted on
> MSI controller side. MSI_FLAG_IRQ_REMAPPING is used to advertise
> this [1].
>
> To have a universal flag to test this capability for different
> archs on PCI side, we set PCI
On Wed, Apr 27, 2016 at 08:43:26PM +0800, Yongji Xie wrote:
> We introduce a new pci_bus_flags, PCI_BUS_FLAGS_MSI_REMAP
> which indicates all devices on the bus are protected by the
> hardware which supports IRQ remapping(intel naming).
This changelog is ambiguous. It's possible that there is har
On 25/04/16 16:58, Sricharan R wrote:
Now that the device's iommu ops are configured at probe time,
the device has to be added to the iommu late.
Signed-off-by: Sricharan R
---
drivers/of/device.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/of/device.c b/drivers/of/device
On 25/04/16 16:58, Sricharan R wrote:
From: Laurent Pinchart
Configuring DMA ops at probe time will allow deferring device probe when
the IOMMU isn't available yet.
Signed-off-by: Laurent Pinchart
---
drivers/base/platform.c | 13 +
drivers/of/platform.c | 7 +++
2 file
On 24/05/16 10:57, Honghui Zhang wrote:
[...]
@@ -48,6 +48,9 @@ struct mtk_iommu_domain {
struct io_pgtable_ops *iop;
struct iommu_domain domain;
+ void*pgt_va;
+ dma_addr_t pgt_pa;
+ void
On 05/12/2016 01:20 PM, Tom Lendacky wrote:
> On 05/10/2016 08:57 AM, Borislav Petkov wrote:
>> On Tue, May 10, 2016 at 02:43:58PM +0100, Matt Fleming wrote:
>>> Is it not possible to maintain some kind of kernel virtual address
>>> mapping so memremap*() and friends can figure out when to twiddle
On Tue, May 24, 2016 at 08:28:08AM +0200, Krzysztof Kozlowski wrote:
> Some of the non-exported functions do not modify passed dma_attrs so the
> pointer can point to const data.
>
> Signed-off-by: Krzysztof Kozlowski
Acked-by: Russell King
Thanks.
--
RMK's Patch system: http://www.armlinux.
On Monday, May 23, 2016 11:35:04 AM CEST Sricharan wrote:
> Hi Arnd,
>
> >> @@ -124,6 +124,9 @@ static void msm_iommu_reset(void __iomem *base, int
> >> ncb)
> >>SET_TLBLKCR(base, ctx, 0);
> >>SET_CONTEXTIDR(base, ctx, 0);
> >>}
> >> +
> >> + /* Ensure completion of r
On Tue, May 24, 2016 at 10:31:17AM +0800, Shunqian Zheng wrote:
> On 2016年05月23日 21:35, Catalin Marinas wrote:
> >On Mon, May 23, 2016 at 11:44:14AM +0100, Robin Murphy wrote:
> >>On 23/05/16 02:37, Shunqian Zheng wrote:
> >>>From: Simon
> >>>
> >>>Signed-off-by: Simon
> >>>---
> >>> drivers/iom
Hi, Robin,
Thanks very much for your comments.
On Mon, 2016-05-23 at 20:31 +0100, Robin Murphy wrote:
> On 19/05/16 12:49, honghui.zh...@mediatek.com wrote:
> > From: Honghui Zhang
> >
> > Mediatek SoC's M4U has two generations of HW architcture. Generation one
> > uses flat, one layer pagetable,
I think this is moving into the wrong direction. The right fix here
is to get of all the dma_attrs boilerplate code and just replace it
with a simple enum dma_flags. This would simplify both the callers
and most importantly the wrappers for the flag-less versions a lot.
__
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