[PATCH V3 9/9] iommu/amd: Set AMD iommu callbacks for amba bus

2016-03-31 Thread Wan Zongshun
From: Wan Zongshun AMD Uart DMA belongs to ACPI HID type device, and its driver is basing on AMBA Bus, need also IOMMU support. This patch is just to set the AMD iommu callbacks for amba bus. Signed-off-by: Wan Zongshun --- drivers/iommu/amd_iommu.c | 13 - 1 file changed, 12 inse

[PATCH V3 8/9] iommu/amd: Manage iommu_group for ACPI HID devices

2016-03-31 Thread Wan Zongshun
From: Wan Zongshun This patch creates a new function for finding or creating an IOMMU group for acpihid(ACPI Hardware ID) device. The acpihid devices with the same devid will be put into same group and there will have the same domain id and share the same page table. Signed-off-by: Wan Zongshun

[PATCH V3 7/9] iommu/amd: Add iommu support for ACPI HID devices

2016-03-31 Thread Wan Zongshun
From: Wan Zongshun Current IOMMU driver make assumption that the downstream devices are PCI. With the newly added ACPI-HID IVHD device entry support, this is no longer true. This patch is to add dev type check and to distinguish the pci and acpihid device code path. Signed-off-by: Wan Zongshun

[PATCH V3 6/9] iommu/amd: Make call-sites of get_device_id aware of its return value

2016-03-31 Thread Wan Zongshun
From: Wan Zongshun This patch is to make the call-sites of get_device_id aware of its return value. Signed-off-by: Wan Zongshun --- drivers/iommu/amd_iommu.c | 51 +-- 1 file changed, 41 insertions(+), 10 deletions(-) diff --git a/drivers/iommu/amd_

[PATCH V3 0/9] iommu/amd: enable ACPI hardware ID device support

2016-03-31 Thread Wan Zongshun
From: Wan Zongshun There are some devices indentified using ACPI HID format in AMD chip. This patch series enable iommu support for those ACPI HID device, since the existing AMD iommu only supports PCI bus based device. The latest public version of AMD IOMMU specification that describes the sup

[PATCH V3 2/9] iommu/amd: Modify ivhd_header structure to support type 11h and 40h

2016-03-31 Thread Wan Zongshun
From: Suravee Suthikulpanit This patch modifies the existing struct ivhd_header, which currently only support IVHD type 0x10, to add new fields from IVHD type 11h and 40h. It also modifies the pointer calculation to allow support for IVHD type 11h and 40h Signed-off-by: Suravee Suthikulpanit -

[PATCH V3 3/9] iommu/amd: Use the most comprehensive IVHD type that the driver can support

2016-03-31 Thread Wan Zongshun
From: Suravee Suthikulpanit The IVRS in more recent AMD system usually contains multiple IVHD block types (e.g. 0x10, 0x11, and 0x40) for each IOMMU. The newer IVHD types provide more information (e.g. new features specified in the IOMMU spec), while maintain compatibility with the older IVHD typ

[PATCH V3 5/9] iommu/amd: Introduces ivrs_acpihid kernel parameter

2016-03-31 Thread Wan Zongshun
From: Suravee Suthikulpanit This patch introduces a new kernel parameter, ivrs_acpihid. This is used to override existing ACPI-HID IVHD device entry, or add an entry in case it is missing in the IVHD. Signed-off-by: Wan Zongshun Signed-off-by: Suravee Suthikulpanit --- Documentation/kernel-pa

[PATCH V3 1/9] iommu/amd: Adding Extended Feature Register check for PC support

2016-03-31 Thread Wan Zongshun
From: Suravee Suthikulpanit The IVHD header type 11h and 40h introduce the PCSup bit in the EFR Register Image bit fileds. This should be used to determine the IOMMU performance support instead of relying on the PNCounters and PNBanks. Note also that the PNCouters and PNBanks bits in the IOMMU a

[PATCH V3 4/9] iommu/amd: Add new map for storing IVHD dev entry type HID

2016-03-31 Thread Wan Zongshun
From: Wan Zongshun This patch introduces acpihid_map, which is used to store the new IVHD device entry extracted from BIOS IVRS table. It also provides a utility function add_acpi_hid_device(), to add this types of devices to the map. Signed-off-by: Wan Zongshun Signed-off-by: Suravee Suthikul

[v7, 4/5] powerpc/fsl: move mpc85xx.h to include/linux/fsl

2016-03-31 Thread Yangbo Lu
Move mpc85xx.h to include/linux/fsl and rename it to svr.h as a common header file. It has been used for mpc85xx and it will be used for ARM-based SoC as well. Signed-off-by: Yangbo Lu Acked-by: Wolfram Sang --- Changes for v2: - None Changes for v3: - None Changes for v4:

[v7, 5/5] mmc: sdhci-of-esdhc: fix host version for T4240-R1.0-R2.0

2016-03-31 Thread Yangbo Lu
The eSDHC of T4240-R1.0-R2.0 has incorrect vender version and spec version. Acturally the right version numbers should be VVN=0x13 and SVN = 0x1. This patch adds the GUTS driver support for eSDHC driver to get SVR(System version register). And fix host version to avoid that incorrect version number

[v7, 3/5] dt: move guts devicetree doc out of powerpc directory

2016-03-31 Thread Yangbo Lu
Move guts devicetree doc to Documentation/devicetree/bindings/soc/fsl/ since it's used by not only PowerPC but also ARM. And add a specification for 'little-endian' property. Signed-off-by: Yangbo Lu --- Changes for v2: - None Changes for v3: - None Changes for v4: - Added

[v7, 2/5] soc: fsl: add GUTS driver for QorIQ platforms

2016-03-31 Thread Yangbo Lu
The global utilities block controls power management, I/O device enabling, power-onreset(POR) configuration monitoring, alternate function selection for multiplexed signals,and clock control. This patch adds GUTS driver to manage and access global utilities block. Signed-off-by: Yangbo Lu --- Ch

[v7, 1/5] ARM64: dts: ls2080a: add device configuration node

2016-03-31 Thread Yangbo Lu
Add the dts node for device configuration unit that provides general purpose configuration and status for the device. Signed-off-by: Yangbo Lu --- Changes for v2: - None Changes for v3: - None Changes for v4: - None Changes for v5: - Added this patch Changes for v6

[v7, 0/5] Fix eSDHC host version register bug

2016-03-31 Thread Yangbo Lu
This patchset is used to fix a host version register bug in the T4240-R1.0-R2.0 eSDHC controller. To get the SoC version and revision, it's needed to add the GUTS driver to access the global utilities registers. So, the first three patches are to add the GUTS driver. The following two patches are

Re: [PATCH 4/4] mtd: provide helper to prepare buffers for DMA operations

2016-03-31 Thread kbuild test robot
Hi Boris, [auto build test ERROR on spi/for-next] [also build test ERROR on v4.6-rc1 next-20160331] [if your patch is applied to the wrong git tree, please drop us a note to help improving the system] url: https://github.com/0day-ci/linux/commits/Boris-Brezillon/scatterlist-sg_table-from

Re: [PATCH 3/4] spi: use sg_alloc_table_from_buf()

2016-03-31 Thread Mark Brown
On Thu, Mar 31, 2016 at 02:29:43PM +0200, Boris Brezillon wrote: > Replace custom implementation of sg_alloc_table_from_buf() by a call to > sg_alloc_table_from_buf(). Acked-by: Mark Brown signature.asc Description: PGP signature ___ iommu mailing lis

Re: [PATCH 2/4] scatterlist: add sg_alloc_table_from_buf() helper

2016-03-31 Thread Russell King - ARM Linux
On Thu, Mar 31, 2016 at 04:45:57PM +0200, Boris Brezillon wrote: > Hi Russell, > > On Thu, 31 Mar 2016 15:14:13 +0100 > Russell King - ARM Linux wrote: > > > On Thu, Mar 31, 2016 at 02:29:42PM +0200, Boris Brezillon wrote: > > > sg_alloc_table_from_buf() provides an easy solution to create an sg

Re: [PATCH 2/4] scatterlist: add sg_alloc_table_from_buf() helper

2016-03-31 Thread Russell King - ARM Linux
On Thu, Mar 31, 2016 at 02:29:42PM +0200, Boris Brezillon wrote: > sg_alloc_table_from_buf() provides an easy solution to create an sg_table > from a virtual address pointer. This function takes care of dealing with > vmallocated buffers, buffer alignment, or DMA engine limitations (maximum > DMA t