On 02/25/2016 06:57 AM, Joerg Roedel wrote:
On Tue, Feb 23, 2016 at 06:51:13PM +0100, Borislav Petkov wrote:
On Tue, Feb 23, 2016 at 09:26:18AM -0800, Laura Abbott wrote:
It was an issue with build signing on the testers machine. Once that was
fixed it was confirmed that the patches did fix the
On Tue, Feb 23, 2016 at 01:20:46AM +0800, Yong Wu wrote:
> Yong Wu (5):
> dt-bindings: iommu: Add binding for mediatek IOMMU
> dt-bindings: mediatek: Add smi dts binding
> memory: mediatek: Add SMI driver
> iommu/mediatek: Add mt8173 IOMMU driver
> dts: mt8173: Add iommu/smi nodes for mt8
> -Original Message-
> From: Bjorn Helgaas [mailto:helg...@kernel.org]
> Sent: Thursday, February 25, 2016 3:39 PM
> To: Bjorn Helgaas
> Cc: Lawrynowicz, Jacek ; linux-
> p...@vger.kernel.org; Alex Williamson ; Joerg
> Roedel ; David Woodhouse ;
> iommu@lists.linux-foundation.org
> Subject
On Wed, Feb 10, 2016 at 03:48:01PM -0600, Jay Cornwall wrote:
> The AMD Family 15h Models 30h-3Fh (Kaveri) BIOS and Kernel Developer's
> Guide omitted part of the BIOS IOMMU L2 register setup specification.
> Without this setup the IOMMU L2 does not fully respect write permissions
> when handling a
On Tue, Feb 23, 2016 at 12:33:22PM +, Will Deacon wrote:
> Please pull the following arm-smmu updates for 4.6. This lays the
> foundations for a functional IOMMU_DOMAIN_DMA for the two drivers,
> although we haven't yet thrown the switch since we need to ensure
> that the DMA ops all point in t
On Thu, Feb 25, 2016 at 03:38:55PM +0100, j...@8bytes.org wrote:
> On Thu, Feb 18, 2016 at 04:16:26PM +, Stuart Yoder wrote:
> > #define IOMMU_READ(1 << 0)
> > #define IOMMU_WRITE (1 << 1)
> > -#define IOMMU_CACHE (1 << 2) /* DMA cache coherency */
> > +#define
On Tue, Feb 23, 2016 at 06:51:13PM +0100, Borislav Petkov wrote:
> On Tue, Feb 23, 2016 at 09:26:18AM -0800, Laura Abbott wrote:
> > It was an issue with build signing on the testers machine. Once that was
> > fixed it was confirmed that the patches did fix the issue.
>
> Btw, Joerg did come up wi
Hi Suravee,
On Tue, Feb 23, 2016 at 08:12:34AM -0600, Suravee Suthikulpanit wrote:
> This is a two-part patch series:
>
> Part1: 1-4 :
> Introduce a workaround for the current AMD IOMMU perf initialization issue
> in some existing KV and CZ platforms, where it fails to write to IOMMU
> perf count
On Mon, Feb 22, 2016 at 10:41:35AM +0900, Simon Horman wrote:
> Make use of ARCH_RENESAS in place of ARCH_SHMOBILE.
>
> This is part of an ongoing process to migrate from ARCH_SHMOBILE to
> ARCH_RENESAS the motivation for which being that RENESAS seems to be a more
> appropriate name than SHMOBILE
On Thursday 25 February 2016 13:26:17 Marek Szyprowski wrote:
> >> +}
> >> +
> >> +extern void *arch_alloc_from_atomic_pool(size_t size, struct page
> >> **ret_page,
> >> + gfp_t flags);
> >> +extern bool arch_in_atomic_pool(void *start, size_t size);
> >> +exte
On Thu, Feb 18, 2016 at 04:16:26PM +, Stuart Yoder wrote:
> #define IOMMU_READ(1 << 0)
> #define IOMMU_WRITE (1 << 1)
> -#define IOMMU_CACHE (1 << 2) /* DMA cache coherency */
> +#define IOMMU_CACHE_COHERENT (1 << 2) /* cacheable and coherent */
> #define IOM
On Wed, Feb 24, 2016 at 01:44:06PM -0600, Bjorn Helgaas wrote:
> From: Jacek Lawrynowicz
>
>
(Sorry, I should have copied this changelog in the patch; I copied
this manually from your v3 posting):
> This patch solves IOMMU support issues with PCIe non-transparent bridges
> that use Requester I
On Thu, Feb 18, 2016 at 03:12:47PM +0100, Marek Szyprowski wrote:
> Marek Szyprowski (13):
> iommu: exynos: rework iommu group initialization
> iommu: exynos: add support for IOMMU_DOMAIN_DMA domain type
> iommu: exynos: remove ARM-specific cache flush interface
> iommu: exynos: simplify ma
Hi Marek,
On Wed, Feb 17, 2016 at 03:42:54PM +0100, Marek Szyprowski wrote:
> From driver perspective the default_domains don't really differ from the
> 'other' domains. They are just allocated from the IOMMU core and used by
> the IOMMU/DMA-mapping glue code. That's what I got from reading the co
On Wed, Feb 10, 2016 at 10:18:04AM +0900, Yoshihiro Shimoda wrote:
> Since iommu_map() code added pgsize value to the paddr, trace_map()
> used wrong paddr. So, this patch adds "orig_paddr" value in the
> iommu_map() to use for the trace_map().
>
> Signed-off-by: Yoshihiro Shimoda
> ---
> driver
On Thu, Feb 18, 2016 at 05:49:18PM +, Will Deacon wrote:
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git
> for-joerg/io-pgtable
Pulled. Thanks Will.
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Hello,
On 2016-02-19 11:30, Arnd Bergmann wrote:
On Friday 19 February 2016 09:22:44 Marek Szyprowski wrote:
This patch replaces ARM-specific IOMMU-based DMA-mapping implementation
with generic IOMMU DMA-mapping code shared with ARM64 architecture. The
side-effect of this change is a switch fro
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