On Wed, Jan 20, 2016 at 02:46:34PM +, Robin Murphy wrote:
> On 20/01/16 13:34, Huang Shijie wrote:
> >On Wed, Jan 20, 2016 at 01:02:25PM +0100, Joerg Roedel wrote:
> >>On Tue, Jan 12, 2016 at 10:15:05AM +0800, Huang Shijie wrote:
> >>>This patch adds a shortcut for the code when the @device_nod
On Wed, Jan 20, 2016 at 10:47:45PM +0200, Adam Morrison wrote:
> On Wed, Jan 20, 2016 at 8:10 PM, Shaohua Li wrote:
> > On Wed, Jan 20, 2016 at 01:21:03PM +0100, Joerg Roedel wrote:
> >> On Sun, Jan 10, 2016 at 07:37:59PM -0800, Shaohua Li wrote:
> >> > I don't know you already posted one. Roughly
On Wed, Jan 20, 2016 at 8:10 PM, Shaohua Li wrote:
> On Wed, Jan 20, 2016 at 01:21:03PM +0100, Joerg Roedel wrote:
>> On Sun, Jan 10, 2016 at 07:37:59PM -0800, Shaohua Li wrote:
>> > I don't know you already posted one. Roughly looked at the patches. We
>> > are using exactly the same idea. I'm ha
On Wed, Jan 20, 2016 at 02:32:00PM -0500, Mark Hounschell wrote:
> Should I use Linus's tree or your tree? If yours, where??
The commits are in Linus's tree, so you can use that one.
Joerg
___
iommu mailing list
iommu@lists.linux-foundation.o
On 01/20/2016 01:26 PM, Joerg Roedel wrote:
On Wed, Jan 20, 2016 at 01:19:52PM -0500, Mark Hounschell wrote:
Would you like me to do anything more right now?
Would be great if you find the time to bisect the issue.
To speed thing up you can test commit b67ad2f and use it as the bad one
if it
On Thu, 2016-01-14 at 21:33 -0800, Jeremy McNicoll wrote:
> Fix a simple typo when disabling IOTLB on PCI(e) devices.
>
> Fixes: b16d0cb9e2fc ("iommu/vt-d: Always enable PASID/PRI PCI
> capabilities before ATS")
> Signed-off-by: Jeremy McNicoll
> ---
> drivers/iommu/intel-iommu.c | 2 +-
> 1 fil
On Wed, Jan 20, 2016 at 01:19:52PM -0500, Mark Hounschell wrote:
>
> Would you like me to do anything more right now?
Would be great if you find the time to bisect the issue.
To speed thing up you can test commit b67ad2f and use it as the bad one
if it shows the same problem.
As good commit you
On 01/20/2016 11:19 AM, Joerg Roedel wrote:
On Wed, Jan 20, 2016 at 11:04:35AM -0500, Mark Hounschell wrote:
amd_iommu=fullflush does not help.
iommu=soft allows it to boot
Okay, good to know, so it is not an issue with stale TLB entries in the
IOMMU.
Thanks,
Joerg
Would you l
On Wed, Jan 20, 2016 at 01:21:03PM +0100, Joerg Roedel wrote:
> On Sun, Jan 10, 2016 at 07:37:59PM -0800, Shaohua Li wrote:
> > I don't know you already posted one. Roughly looked at the patches. We
> > are using exactly the same idea. I'm happy we pursue your patches. At
> > the first look, the pe
On Wed, Jan 20, 2016 at 11:04:35AM -0500, Mark Hounschell wrote:
>
> amd_iommu=fullflush does not help.
>
> iommu=soft allows it to boot
Okay, good to know, so it is not an issue with stale TLB entries in the
IOMMU.
Thanks,
Joerg
___
iommu
On 01/20/2016 10:46 AM, Joerg Roedel wrote:
On Wed, Jan 20, 2016 at 04:38:23PM +0100, Joerg Roedel wrote:
On Thu, Jan 14, 2016 at 09:04:08AM -0500, Mark Hounschell wrote:
OK, I verified the 2 disks are hanging off the Marvel chips.
Here is the dmesg from booting with your patch and the 2
disks
On 01/20/2016 10:38 AM, Joerg Roedel wrote:
On Thu, Jan 14, 2016 at 09:04:08AM -0500, Mark Hounschell wrote:
OK, I verified the 2 disks are hanging off the Marvel chips.
Here is the dmesg from booting with your patch and the 2
disks not showing up.
Does it boot with iommu=soft?
Yes. It does
On Wed, Jan 20, 2016 at 04:38:23PM +0100, Joerg Roedel wrote:
> On Thu, Jan 14, 2016 at 09:04:08AM -0500, Mark Hounschell wrote:
> > OK, I verified the 2 disks are hanging off the Marvel chips.
> > Here is the dmesg from booting with your patch and the 2
> > disks not showing up.
>
> Does it boo
On Thu, Jan 14, 2016 at 09:04:08AM -0500, Mark Hounschell wrote:
> OK, I verified the 2 disks are hanging off the Marvel chips.
> Here is the dmesg from booting with your patch and the 2
> disks not showing up.
Does it boot with iommu=soft?
> These appear to be the 2 failing disks
> #dmesg | gr
I found it archived in this place well:
https://www.mail-archive.com/iommu@lists.linux-foundation.org/msg10687.html
But pasted dmesg has been lost. putting "lspci -tv" and "lspci -vvv" is
more helpful.
Besides does it work with latest kernel?
Thanks
Baoquan
On 12/02/15 at 02:56pm, Laine Stump
On 20/01/16 13:34, Huang Shijie wrote:
On Wed, Jan 20, 2016 at 01:02:25PM +0100, Joerg Roedel wrote:
On Tue, Jan 12, 2016 at 10:15:05AM +0800, Huang Shijie wrote:
This patch adds a shortcut for the code when the @device_node is NULL.
In my juno-r1 board, the boot time can be faster by 0.004014s
On 01/20/2016 09:10 AM, Baoquan He wrote:
I found it archived in this place well:
https://www.mail-archive.com/iommu@lists.linux-foundation.org/msg10687.html
But pasted dmesg has been lost. putting "lspci -tv" and "lspci -vvv" is
more helpful.
Sure, I'll boot it with the two kernels again tod
In below commit alias DTE is set when its peripheral is
setting DTE. However there's a code bug here to wrongly
set the alias DTE, correct it in this patch.
commit e25bfb56ea7f046b71414e02f80f620deb5c6362
Author: Joerg Roedel
Date: Tue Oct 20 17:33:38 2015 +0200
iommu/amd: Set alias DTE in
On Wed, Jan 20, 2016 at 01:02:25PM +0100, Joerg Roedel wrote:
> On Tue, Jan 12, 2016 at 10:15:05AM +0800, Huang Shijie wrote:
> > This patch adds a shortcut for the code when the @device_node is NULL.
> > In my juno-r1 board, the boot time can be faster by 0.004014s.
>
> How have you made sure thi
On 01/20/16 at 08:03am, Mark Hounschell wrote:
> On 01/20/2016 07:31 AM, Joerg Roedel wrote:
> >Hi Baoquan,
> >
> >On Wed, Jan 13, 2016 at 11:09:50AM +0800, Baoquan He wrote:
> >>Seems 0f:00.0 is not attached to a group so that it get a domain. Can
> >>you also paste your "lspci -t" and "lspci -vvv
On 01/20/16 at 01:31pm, Joerg Roedel wrote:
> Hi Baoquan,
>
> On Wed, Jan 13, 2016 at 11:09:50AM +0800, Baoquan He wrote:
> > Seems 0f:00.0 is not attached to a group so that it get a domain. Can
> > you also paste your "lspci -t" and "lspci -vvv" output? Here 0f:00.0
> > should be a pci bridge wh
On 01/20/2016 07:31 AM, Joerg Roedel wrote:
Hi Baoquan,
On Wed, Jan 13, 2016 at 11:09:50AM +0800, Baoquan He wrote:
Seems 0f:00.0 is not attached to a group so that it get a domain. Can
you also paste your "lspci -t" and "lspci -vvv" output? Here 0f:00.0
should be a pci bridge which need set th
Hi Laine,
On Wed, Dec 02, 2015 at 02:56:37PM -0500, Laine Stump wrote:
> On 11/08/2015 11:52 AM, Laine Stump wrote:
> > Here is the dmesg
> > with IOMMU enabled in the BIOS (i.e. the devices *don't* work):
> >
> >http://fpaste.org/296772/14490851/
> >
> > and here is is when IOMMU has been *di
Hi Baoquan,
On Wed, Jan 13, 2016 at 11:09:50AM +0800, Baoquan He wrote:
> Seems 0f:00.0 is not attached to a group so that it get a domain. Can
> you also paste your "lspci -t" and "lspci -vvv" output? Here 0f:00.0
> should be a pci bridge which need set the same domain with its
> peripheral :
On Sun, Jan 10, 2016 at 07:37:59PM -0800, Shaohua Li wrote:
> I don't know you already posted one. Roughly looked at the patches. We
> are using exactly the same idea. I'm happy we pursue your patches. At
> the first look, the per-cpu allocation in your patch doesn't check
> pfn_limit, that could b
On Tue, Jan 12, 2016 at 10:15:05AM +0800, Huang Shijie wrote:
> This patch adds a shortcut for the code when the @device_node is NULL.
> In my juno-r1 board, the boot time can be faster by 0.004014s.
How have you made sure this number is reliable and not just noise in the
boot process?
J
Hi Vincent,
On Sat, Jan 09, 2016 at 05:47:15PM +0800, Wan Zongshun wrote:
> If so we will modify some existing amd iommu driver codes, and Can I
> merge those into this patch 5/6? or I will create another dedicated
> patch to take this action?
I think its best to make a seperate patch which makes
Hi,
On Tue, Jan 19, 2016 at 09:49:08AM +0800, Wan ZongShun wrote:
> It is a separating patch to our acpihid device support patches.
Please re-submit it after the merge window together with the acpihid
support patches. This stuff can be merged together.
Thanks,
Joerg
___
28 matches
Mail list logo
