[PATCH] iommu/amd: Fix for L2 race with VM invalidation

2014-05-13 Thread suravee.suthikulpanit
From: Jay Cornwall Do not disassociate the process page tables from a PASID during VM invalidation. Invalidate the IOMMU TLB and IOTLBs before invalidation. L2 translations may fail during VM range invalidation. The current implementation associates an empty page table with a PASID within the cr

Re: [PATCH v13 00/19] iommu/exynos: Fixes and Enhancements of System MMU driver with DT

2014-05-13 Thread Shaik Ameer Basha
On Tue, May 13, 2014 at 10:50 PM, Joerg Roedel wrote: > On Mon, May 12, 2014 at 11:44:45AM +0530, Shaik Ameer Basha wrote: >> Cho KyongHo (18): >> iommu/exynos: fix build errors >> iommu/exynos: change error handling when page table update is failed >> iommu/exynos: allocate lv2 page table f

[PATCH] documentation/iommu: Add note on existing DT binding status

2014-05-13 Thread Shaik Ameer Basha
The current dt binding for Exynos System MMU can be changed, if found incompatible with the support for "Generic IOMMU Binding". This patch adds a note to the binding documentation stating the same. Signed-off-by: Shaik Ameer Basha --- .../devicetree/bindings/iommu/samsung,sysmmu.txt |5 ++

Re: [PATCH v3] iommu: Add driver for Renesas VMSA-compatible IPMMU

2014-05-13 Thread Joerg Roedel
On Tue, May 13, 2014 at 11:04:10PM +0200, Laurent Pinchart wrote: > > Isn't this the same as ipmmu_tlb_invalidate()? > > ipmmu_tlb_invalidate() performs a read-update-write operation on the IMCTR > register to set the FLUSH bit without modifying the other bits, while this > function writes the F

Re: [PATCH v3] iommu: Add driver for Renesas VMSA-compatible IPMMU

2014-05-13 Thread Laurent Pinchart
Hi Joerg, On Tuesday 13 May 2014 19:55:29 Joerg Roedel wrote: > Hi Laurent, > > Sorry for taking so long with this. No worries. As long as the driver gets in v3.16 (wink wink :-)) that's fine > The code looks good and clean overall, besides my second comment. > > On Wed, Apr 02, 2014 at 12:47:

Re: [PATCH v3] iommu: Add driver for Renesas VMSA-compatible IPMMU

2014-05-13 Thread Joerg Roedel
Hi Laurent, Sorry for taking so long with this. The code looks good and clean overall, besides my second comment. On Wed, Apr 02, 2014 at 12:47:37PM +0200, Laurent Pinchart wrote: > +static void ipmmu_domain_destroy_context(struct ipmmu_vmsa_domain *domain) > +{ > + /* > + * Disable the

Re: [PATCH v13 00/19] iommu/exynos: Fixes and Enhancements of System MMU driver with DT

2014-05-13 Thread Joerg Roedel
On Mon, May 12, 2014 at 11:44:45AM +0530, Shaik Ameer Basha wrote: > Cho KyongHo (18): > iommu/exynos: fix build errors > iommu/exynos: change error handling when page table update is failed > iommu/exynos: allocate lv2 page table from own slab > iommu/exynos: fix L2TLB invalidation > iom

Re: [PATCH v13 00/19] iommu/exynos: Fixes and Enhancements of System MMU driver with DT

2014-05-13 Thread Shaik Ameer Basha
On Mon, May 12, 2014 at 3:37 PM, Arnd Bergmann wrote: > On Monday 12 May 2014 11:44:45 Shaik Ameer Basha wrote: >> This is the subset of previous v12 series and includes only the fixes and >> enhancements, leaving out the private DT bindings as discussed in the below >> thread. >> -- http://w

Re: [PATCH v1 1/1] iommu/amd: fix enabling exclusion range for an exact device

2014-05-13 Thread j...@8bytes.org
On Wed, May 07, 2014 at 01:54:52PM +0800, Su, Friendy wrote: > > From: Su Friendy > > set_device_exclusion_range(u16 devid, struct ivmd_header *m) enables > exclusion range for ONE device. IOMMU does not translate the access > to the exclusion range from the device. > > The device is specified