Hi shaik,
+Doug, Abhilash,
On Sun, Apr 27, 2014 at 1:08 PM, Shaik Ameer Basha
wrote:
> From: Cho KyongHo
>
> Signed-off-by: Cho KyongHo
> ---
> arch/arm/boot/dts/exynos5250.dtsi | 270
> -
> 1 file changed, 267 insertions(+), 3 deletions(-)
>
> diff --git
On Sunday 27 April 2014 13:07:43 Shaik Ameer Basha wrote:
> +- mmu-masters: A phandle to device nodes representing the master for which
> + the System MMU can provide a translation. Any additional
> values
> + after the phandle will be ignored because a System MMU never
On Sunday 27 April 2014 13:07:47 Shaik Ameer Basha wrote:
> @@ -542,14 +592,41 @@ static int __init exynos_sysmmu_probe(struct
> platform_device *pdev)
> }
> }
>
> + /* Relation between master and System MMU is 1:1. */
> + node = of_parse_phandle(dev->of_node, "mmu-ma
From: Cho KyongHo
Signed-off-by: Cho KyongHo
---
arch/arm/boot/dts/exynos5250.dtsi | 270 -
1 file changed, 267 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 3742331..eebd397 100644
-
From: Cho KyongHo
This patch adds System MMU nodes of exynos5420 except
System MMUs in Image Subsystem.
Signed-off-by: Cho KyongHo
Signed-off-by: Shaik Ameer Basha
---
arch/arm/boot/dts/exynos5420.dtsi | 209 -
1 file changed, 206 insertions(+), 3 deletion
From: Cho KyongHo
This adds gate clocks of all System MMUs and their master IPs
that are not apeared in clk-exynos5250.c and clk-exynos5420.c
Signed-off-by: Cho KyongHo
---
drivers/clk/samsung/clk-exynos5250.c | 36
drivers/clk/samsung/clk-exynos5420.c |
From: Cho KyongHo
This commit introduces sysmmu_pte_t for page table entries and
sysmmu_iova_t vor I/O virtual address that is manipulated by
exynos-iommu driver. The purpose of the typedef is to remove
dependencies to the driver code from the change of CPU architecture
from 32 bit to 64 bit.
Si
From: Cho KyongHo
This patch adds System MMU nodes that are common to exynos4 series.
Signed-off-by: Cho KyongHo
---
arch/arm/boot/dts/exynos4.dtsi | 107
1 file changed, 107 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dt
From: Cho KyongHo
This patch contains 2 workaround for the System MMU v3.x.
System MMU v3.2 and v3.3 has FLPD cache that caches first level page
table entries to reduce page table walking latency. However, the
FLPD cache is filled with a first level page table entry even though
it is not accesse
From: Cho KyongHo
This patch adds System MMUs that are specific to exynos4210.
Signed-off-by: Cho KyongHo
---
arch/arm/boot/dts/exynos4210.dtsi | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos4210.dtsi
b/arch/arm/boot/dts/e
From: Cho KyongHo
Some redundant error message is removed and some error messages
are changed to error level from debug level.
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 23 +--
1 file changed, 9 insertions(+), 14 deletions(-)
diff --git a/drivers/iomm
From: Cho KyongHo
This commit changes the function to get MMU version simpler.
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 30 ++
1 file changed, 6 insertions(+), 24 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-i
From: Cho KyongHo
This patch adds System MMU nodes that are specifict to exynos4x12
series.
Signed-off-by: Cho KyongHo
---
arch/arm/boot/dts/exynos4x12.dtsi | 78 -
1 file changed, 77 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos4x12.
From: Cho KyongHo
This patch gates clocks of master H/W as well as clocks of System MMU
if master clocks are specified.
Some Exynos SoCs (i.e. GScalers in Exynos5250) have dependencies in
the gating clocks of master H/W and its System MMU. If a H/W is the
case, accessing control registers of Sys
From: Cho KyongHo
This turns on FLPD_CACHE, ACGEN and SYSSEL.
FLPD_CACHE is a cache of 1st level page table entries that contains
the address of a 2nd level page table to reduce latency of page table
walking.
ACGEN is architectural clock gating that gates clocks by System MMU
itself if it is no
From: Cho KyongHo
Use of __pa and __va macro is changed to virt_to_phys and phys_to_virt
which are recommended in driver code. printk formatting of physical
address is also fixed to %pa.
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 33 +
1 fil
From: Cho KyongHo
This commit adds device tree support for System MMU.
It also enables iommu support for ARCH_EXYNOS.
Signed-off-by: Cho KyongHo
Signed-off-by: Shaik Ameer Basha
---
arch/arm/Kconfig |2 ++
drivers/iommu/Kconfig|8 +++-
drivers/iommu/exynos-iomm
From: Antonios Motakis
Patch written by Antonios Motakis :
IOMMU groups are expected by certain users of the IOMMU API,
e.g. VFIO. Since each device is behind its own System MMU, we
can allocate a new IOMMU group for each device.
Reviewd-by: Cho KyongHo
Signed-off-by: Antonios Motakis
---
dr
From: Cho KyongHo
Since acquiring read_lock is not more frequent than write_lock, it is
not beneficial to use rwlock, this commit changes rwlock to spinlock.
Reviewed-by: Grant Grundler
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 39 ---
From: Cho KyongHo
This patch uses managed device helper functions in the probe().
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 68 --
1 file changed, 25 insertions(+), 43 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/driver
From: Cho KyongHo
This commit removes custom fault handler. The device drivers that
need to register fault handler can register
with iommu_set_fault_handler().
CC: Grant Grundler
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 80 +-
1 f
From: Cho KyongHo
This patch adds a description of the device tree binding for the
Samsung Exynos System MMU.
Signed-off-by: Cho KyongHo
---
.../devicetree/bindings/iommu/samsung,sysmmu.txt | 79
1 file changed, 79 insertions(+)
create mode 100644 Documentation/device
From: Cho KyongHo
This adds support for Suspend to RAM and Runtime Power Management.
Since System MMU is located in the same local power domain of its
master H/W, System MMU must be initialized before it is working if
its power domain was ever turned off. TLB invalidation according to
unmapping
From: Cho KyongHo
"iommu/exynos: support for device tree" patch just binds exynos-iommu
driver with the compatible strings of System MMUs but the important
information of the DT, 'mmu-masters' is not processed by the driver.
This patch process 'mmu-masters' so that the master device driver can
ha
From: Cho KyongHo
Some master device descriptor like fimc-is which is an abstraction
of very complex H/W may have multiple System MMUs. For those devices,
the design of the link between System MMU and its master H/W is needed
to be reconsidered.
A link structure, sysmmu_list_data is introduced t
From: Cho KyongHo
This patch removes dbgname member from sysmmu_drvdata structure.
Kernel message for debugging already has the name of a single
System MMU node. It also removes some compilation warnings.
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 54 +++---
From: Cho KyongHo
Since kmalloc() does not guarantee that the allignment of 1KiB when it
allocates 1KiB, it is required to allocate lv2 page table from own
slab that guarantees alignment of 1KiB
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 34
From: Cho KyongHo
Prefetch buffer is a cache of System MMU 3.x and caches a block of
page table entries to make effect of larger page with small pages.
However, how to control prefetch buffers and the specifications of
prefetch buffers different from minor versions of System MMU v3.
Prefetch buff
From: Cho KyongHo
Checking if the probing device has a parent device was just to discover
if the probing device is involved in a power domain when the power
domain controlled by Samsung's custom implementation.
Since generic IO power domain is applied, it is required to remove
the condition to se
From: Cho KyongHo
System MMU driver is changed to control only a single instance of
System MMU at a time. Since a single instance of System MMU has only
a single clock descriptor for its clock gating, single address range
for control registers, there is no need to obtain two or more clock
descrip
From: Cho KyongHo
Commit 25e9d28d92 (ARM: EXYNOS: remove system mmu initialization from
exynos tree) removed arch/arm/mach-exynos/mach/sysmmu.h header without
removing remaining use of it from exynos-iommu driver, thus causing a
compilation error.
This patch fixes the error by removing respectiv
From: Cho KyongHo
This patch changes not to panic on any error when updating page table.
Instead prints error messages with callstack.
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 58 --
1 file changed, 44 insertions(+), 14 deletions(-
From: Cho KyongHo
This commit adds cache flush for removed small and large page entries
in exynos_iommu_unmap(). Missing cache flush of removed page table
entries can cause missing page fault interrupt when a master IP
accesses an unmapped area.
Reviewed-by: Tomasz Figa
Tested-by: Grant Grundle
From: Cho KyongHo
L2TLB is 8-way set-associative TLB with 512 entries. The number of
sets is 64.
A single 4KB(small page) translation information is cached
only to a set whose index is the same with the lower 6 bits of the page
frame number.
A single 64KB(large page) translation information can b
The current exynos-iommu(System MMU) driver does not work autonomously
since it is lack of support for power management of peripheral blocks.
For example, MFC device driver must ensure that its System MMU is disabled
before MFC block is power-down not to invalidate IOTLB in the System MMU
when I/O
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