Re: [PATCHv3 10/19] iommu/tegra: smmu: Get "nvidia,swgroups" from DT

2013-11-03 Thread Hiroshi Doyu
Stephen Warren wrote @ Fri, 1 Nov 2013 17:54:37 +0100: > On 10/31/2013 02:17 AM, Hiroshi Doyu wrote: > > Stephen Warren wrote @ Wed, 30 Oct 2013 23:33:32 > > +0100: > ... > > Right. > > "memory client ID" is used to find out MC_SMMU__ASID_0 > > register. This register is used to associate to a

Re: [PATCHv3 14/19] iommu/tegra: smmu: Get "nvidia,memory-clients" from DT

2013-11-03 Thread Hiroshi Doyu
Stephen Warren wrote @ Fri, 1 Nov 2013 18:05:09 +0100: > > What are the requirements for Tegra? If the IOMMU isn't initialised, does it > > act as a passthrough? > > I believe so, yes. In particular we have the following register bits: > > 1) Register bit AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DON

Re: [PATCHv3 01/19] [HACK] of: dev_node has struct device pointer

2013-11-03 Thread Hiroshi Doyu
Stephen Warren wrote @ Fri, 1 Nov 2013 22:45:19 +0100: > On 11/01/2013 03:59 AM, Hiroshi Doyu wrote: > ... > > One idea is that, rather than inserting a hook(function) per > > subsystems in driver core, if we invent a new /special section/ which > > collects all hooks in sequence like initcalls,