(2013/03/26 23:46), Joerg Roedel wrote:
> On Thu, Mar 21, 2013 at 10:32:36AM +0900, Takao Indoh wrote:
>> In this function, clearing IRE bit in iommu->gcmd and writing it to
>> global command register. But initial value of iommu->gcmd is zero, so
>> this writel means clearing all bits in global com
On Tue, Mar 26, 2013 at 3:59 PM, Joerg Roedel wrote:
> Hi Bjorn,
>
> On Tue, Mar 26, 2013 at 03:41:07PM -0600, Bjorn Helgaas wrote:
>> Since some of these touch drivers/iommu, it'd be good if you acked
>> them again, Joerg. I know you acked them before, but there have been
>> minor changes since
Hi Bjorn,
On Tue, Mar 26, 2013 at 03:41:07PM -0600, Bjorn Helgaas wrote:
> Since some of these touch drivers/iommu, it'd be good if you acked
> them again, Joerg. I know you acked them before, but there have been
> minor changes since then, so I didn't add your ack to these. But if
> you're stil
On Wed, Feb 27, 2013 at 5:06 PM, Shuah Khan wrote:
> pci defines PCI_DEVFN(), PCI_SLOT(), and PCI_FUNC() interfaces, however,
> it doesn't have interfaces to return PCI bus and PCI device id. Drivers
> (AMD IOMMU, and AER) have module specific definitions for PCI_BUS() and
> AMD_IOMMU driver also
On Tue, Mar 26, 2013 at 08:40:18PM +0100, Andreas Degert wrote:
> dmesg output appended. I was wrong, there are io page faults
> when I trigger dma transfer with the soundcard, like you expected.
> At the end of the dmesg output are the IO_PAGE_FAULT's from
> trying to do a playback.
Okay, thanks
On Tue, Mar 26, 2013 at 04:20:54PM +0100, Andreas Degert wrote:
> There is a third sound device:
>
> 04:00.0 Multimedia audio controller: Xilinx Corporation RME Hammerfall
> DSP (rev 35)
>
> (at the end of the lspci listing in my first mail). This is the one that
> doesn't
> work, it's connected
2013/3/26 Joerg Roedel :
> Hi Andreas,
>
> thanks for the information.
>
> On Tue, Mar 26, 2013 at 01:48:38PM +0100, Andreas Degert wrote:
>> seems to be this (additionaly I have appended the full dump):
>>
>> device: 00:00.2 cap: 0040 seg: 0 flags: fe info 1300
>> mmio-addr: feb8
On Fri, Mar 08, 2013 at 10:53:16AM +0800, Andrew Cooks wrote:
> I'm hoping one of the veteran developers would give some guidance for
> the best approach to enable more devices in future.
In cases like this where a device just uses the request-id of another
device you can make use of the existing
On Thu, Mar 21, 2013 at 10:32:36AM +0900, Takao Indoh wrote:
> In this function, clearing IRE bit in iommu->gcmd and writing it to
> global command register. But initial value of iommu->gcmd is zero, so
> this writel means clearing all bits in global command register.
Seems weird. Why is the value
Hi Andreas,
thanks for the information.
On Tue, Mar 26, 2013 at 01:48:38PM +0100, Andreas Degert wrote:
> seems to be this (additionaly I have appended the full dump):
>
> device: 00:00.2 cap: 0040 seg: 0 flags: fe info 1300
> mmio-addr: feb8
>DEV_SELECT_RANGE_START de
Hi Andreas,
On Tue, Mar 26, 2013 at 08:37:02AM +0100, Andreas Degert wrote:
> Does anyone have some advice for further debugging?
Can you please boot with amd_iommu_dump on the kernel command line and
send dmesg after boot? This will print the parsing output of the IVRS
table to dmesg which will
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