Re: [PATCH v2] Intel IOMMU patch to reprocess RMRR info

2012-09-27 Thread Linda Knippers
Alex Williamson wrote: > On Thu, 2012-09-27 at 21:10 +, Mingarelli, Thomas wrote: >> Alex, >> >> Are you suggesting that a solution is to prevent devices with RMRRs >> from being placed in the SI Domain in the first place (when pt mode is >> used)? > > No, it seems like it's preferable that de

Re: [PATCH v2] Intel IOMMU patch to reprocess RMRR info

2012-09-27 Thread Alex Williamson
On Thu, 2012-09-27 at 17:50 -0400, Linda Knippers wrote: > Alex Williamson wrote: > > On Thu, 2012-09-27 at 21:10 +, Mingarelli, Thomas wrote: > >> Alex, > >> > >> Are you suggesting that a solution is to prevent devices with RMRRs > >> from being placed in the SI Domain in the first place (whe

RE: [PATCH v2] Intel IOMMU patch to reprocess RMRR info

2012-09-27 Thread Mingarelli, Thomas
I think this sounds like a separate patch. Tom -Original Message- From: Knippers, Linda Sent: Thursday, September 27, 2012 4:51 PM To: Alex Williamson Cc: Mingarelli, Thomas; iommu@lists.linux-foundation.org; Khan, Shuah; Don Dutile; David Woodhouse Subject: Re: [PATCH v2] Intel IOMMU

Re: [PATCH v2] Intel IOMMU patch to reprocess RMRR info

2012-09-27 Thread David Woodhouse
On Thu, 2012-09-27 at 15:34 -0600, Alex Williamson wrote: > It really seems like RMRRs are incompatible with IOMMU API use though. > If an RMRR is setup for a VM domain, that's bad because a) it gives the > VM direct access to that range of host memory, and b) it interferes with > the guest use of

Re: [PATCH v2] Intel IOMMU patch to reprocess RMRR info

2012-09-27 Thread Alex Williamson
On Thu, 2012-09-27 at 21:10 +, Mingarelli, Thomas wrote: > Alex, > > Are you suggesting that a solution is to prevent devices with RMRRs > from being placed in the SI Domain in the first place (when pt mode is > used)? No, it seems like it's preferable that devices with RMRRs stay in the si d

RE: [PATCH v2] Intel IOMMU patch to reprocess RMRR info

2012-09-27 Thread Mingarelli, Thomas
Alex, Are you suggesting that a solution is to prevent devices with RMRRs from being placed in the SI Domain in the first place (when pt mode is used)? Tom -Original Message- From: Alex Williamson [mailto:alex.william...@redhat.com] Sent: Thursday, September 27, 2012 3:37 PM To: Minga

Re: [PATCH v2] Intel IOMMU patch to reprocess RMRR info

2012-09-27 Thread Alex Williamson
[adding David Woodhouse] On Tue, 2012-09-18 at 16:49 +, Tom Mingarelli wrote: > When a 32bit PCI device is removed from the SI Domain, the RMRR information > for this device becomes invalid and needs to be reprocessed to avoid DMA > Read errors. These errors are evidenced by the Present bit be

Re: 3.6-rc7 boot crash + bisection

2012-09-27 Thread Florian Dazinger
Am Wed, 26 Sep 2012 16:04:03 -0600 schrieb Alex Williamson : > On Wed, 2012-09-26 at 13:50 -0600, Alex Williamson wrote: > > On Wed, 2012-09-26 at 10:21 -0600, Alex Williamson wrote: > > > On Wed, 2012-09-26 at 17:10 +0200, Roedel, Joerg wrote: > > > > On Wed, Sep 26, 2012 at 08:35:59AM -0600, Ale