write_file_bool() modifies 32 bits of data, so "amd_iommu_unmap_flush"
needs to be 32 bits as well or we'll corrupt memory. Fortunately it
looks like the data is aligned with a gap after the declaration so this
is harmless in production.
Signed-off-by: Dan Carpenter
diff --git a/drivers/iommu/a
On Tue, Feb 28, 2012 at 4:01 PM, Kyungmin Park
wrote:
> Hi,
>
> Some comments.
> 1. It's not same patch series. since it has additional feature,
> exynos5 series support which don't covered at previous time.
> 2. It assumes that name conversion is based on exynos5 as default. now
> you use gsc at
Hi Laurent,
On Thu, Mar 1, 2012 at 6:37 PM, Laurent Pinchart
wrote:
> I'll try that then. How expensive is the iommu_attach_device() (and detach)
> operation in terms of CPU time ?
omap_iommu_attach() basically enables the iommu clock and configures
that IP block.
I suspect it's negligible but
Hi Ohad,
On Monday 27 February 2012 09:00:51 Ohad Ben-Cohen wrote:
> On Mon, Feb 27, 2012 at 12:47 AM, Laurent Pinchart wrote:
> > I'm asking about the probe deferral mechanism. The omap3-isp driver will
> > still call iommu_attach_device() in its probe function. What will happen
> > then ? Will i
The hardware-initializtion part of the AMD IOMMU driver is
split out into a seperate function. This function can now be
called either from amd_iommu_init() itself or any other
place if the hardware needs to be ready earlier. This will
be used to implement interrupt remapping for AMD.
Signed-off-by
Hello,
On Wednesday, February 29, 2012 1:26 AM KyongHo Cho wrote:
> On Tue, Feb 28, 2012 at 4:20 PM, Kyungmin Park
> wrote:
> > Hi,
> >
> > On 2/28/12, KyongHo Cho wrote:
> >> Handling System MMUs with an identifier is not flexible to manage
> >> System MMU platform devices because of the fol
Hi,
On Tuesday, February 28, 2012 7:37 AM KyongHo Cho wrote:
> Changes since v8:
> - exynos_iommu_map/unmap() just works for the page sizes
>that System MMU supports. (Joerg's comment)
> - 1 platform device for 1 H/W though a multimedia accelerator
>with several System MMUs attached.
>
