Re: [Intel-wired-lan] [PATCH v3 iwl-next] ice: Add in/out PTP pin delays

> -Original Message- > From: Intel-wired-lan On Behalf Of Simon > Horman > Sent: Friday, December 6, 2024 5:17 AM > To: Kolacinski, Karol > Cc: intel-wired-...@lists.osuosl.org; net...@vger.kernel.org; Nguyen, Anthony > L ; Kitszel, Przemyslaw > > Subject: Re: [Intel-wired-lan] [PATCH

[Intel-wired-lan] [Question] ixgbe：Mechanism of RSS

Hi masters, We use the Intel Corporation 82599ES NIC in our production environment. And it has 63 rx queues, every rx queue interrupt is processed by a single cpu. The RSS configuration can be seen as follow: RX flow hash indirection table for eno5 with 63 RX ring(s): 0: 0

[Intel-wired-lan] [PATCH] i40e: Disable i40e PCIe AER on system reboot

Disable PCIe AER on the i40e device on system reboot on a limited list of Dell PowerEdge systems. This prevents a fatal PCIe AER event on the i40e device during the ACPI _PTS (prepare to sleep) method for S5 on those systems. The _PTS is invoked by acpi_enter_sleep_state_prep() as part of the kerne

Re: [Intel-wired-lan] [PATCH RFCv5 1/8] page_pool: introduce page_pool_to_pp() API

On 2024/12/20 20:29, Ilias Apalodimas wrote: > Hi Yunsheng, > > On Fri, 13 Dec 2024 at 14:35, Yunsheng Lin wrote: >> >> introduce page_pool_to_pp() API to avoid caller accessing >> page->pp directly. >> > > I think we already have way too many abstractions, I'd say we need > less not more. I don