[Intel-wired-lan] [tnguy-net-queue:1GbE] BUILD SUCCESS 275ee01e2bbeaf9aa43f6e0b11c6ab414e6986a0

2024-04-30 Thread kernel test robot
allnoconfig gcc arc allyesconfig gcc arc defconfig gcc arc haps_hs_defconfig gcc arc randconfig-001-20240430 gcc arc randconfig

Re: [Intel-wired-lan] [PATCH v7 09/12] timekeeping: Add function to convert realtime to base clock

2024-04-30 Thread kernel test robot
Hi, kernel test robot noticed the following build warnings: [auto build test WARNING on tip/timers/core] [also build test WARNING on tnguy-next-queue/dev-queue tnguy-net-queue/dev-queue linus/master v6.9-rc6 next-20240430] [cannot apply to tip/x86/core] [If your patch is applied to the wrong

Re: [Intel-wired-lan] [PATCH v7 01/12] timekeeping: Add base clock properties in clocksource structure

2024-04-30 Thread Peter Hilber
On 30.04.24 10:52, lakshmi.sowjany...@intel.com wrote: > From: Lakshmi Sowjanya D > > Add base clock hardware abstraction in clocksource structure. > > Provide generic functionality in convert_base_to_cs() to convert base > clock timestamps to system clocksource without requiring architecture >

Re: [Intel-wired-lan] [PATCH iwl-net v1 1/1] e1000e: change usleep_range to udelay in PHY mdic access

2024-04-30 Thread Jiri Slaby
On 17. 04. 24, 21:03, Vitaly Lifshits wrote: This is a partial revert of commit 6dbdd4de0362 ("e1000e: Workaround for sporadic MDI error on Meteor Lake systems"). The referenced commit introduced an issue on vPro systems, where disconnecting and reconnecting the LAN cable might result in a kernel

Re: [Intel-wired-lan] [PATCH v7 10/12] pps: generators: Add PPS Generator TIO Driver

2024-04-30 Thread Andy Shevchenko
On Tue, Apr 30, 2024 at 02:22:23PM +0530, lakshmi.sowjany...@intel.com wrote: > From: Lakshmi Sowjanya D > > The Intel Timed IO PPS generator driver outputs a PPS signal using > dedicated hardware that is more accurate than software actuated PPS. > The Timed IO hardware generates output events us

[Intel-wired-lan] [tnguy-net-queue:dev-queue] BUILD SUCCESS c05c1cca54e658ad50bc5eb68088d21fbbb51bc3

2024-04-30 Thread kernel test robot
allnoconfig gcc arc allyesconfig gcc arc defconfig gcc arc randconfig-001-20240430 gcc arc randconfig-002-20240430 gcc arm

Re: [Intel-wired-lan] [PATCH v2] ice: Fix enabling SR-IOV with Xen

2024-04-30 Thread Ross Lagerwall
On Mon, Apr 29, 2024 at 2:04 PM Paul Menzel wrote: > > Dear Ross, > > > Thank you for your patch. > > Am 29.04.24 um 14:49 schrieb Ross Lagerwall: > > When the PCI functions are created, Xen is informed about them and > > caches the number of MSI-X entries each function has. However, the > > numb

[Intel-wired-lan] [PATCH v7 12/12] ABI: pps: Add ABI documentation for Intel TIO

2024-04-30 Thread lakshmi . sowjanya . d
From: Lakshmi Sowjanya D Document sysfs interface for Intel Timed I/O PPS driver. Signed-off-by: Lakshmi Sowjanya D --- Documentation/ABI/testing/sysfs-platform-pps-tio | 7 +++ MAINTAINERS | 1 + 2 files changed, 8 insertions(+) create mode 100644 Doc

[Intel-wired-lan] [PATCH v7 11/12] Documentation: driver-api: pps: Add Intel Timed I/O PPS generator

2024-04-30 Thread lakshmi . sowjanya . d
From: Lakshmi Sowjanya D Add Intel Timed I/O PPS usage instructions. Co-developed-by: Pandith N Signed-off-by: Pandith N Signed-off-by: Lakshmi Sowjanya D Reviewed-by: Andy Shevchenko Acked-by: Rodolfo Giometti --- Documentation/driver-api/pps.rst | 22 ++ 1 file change

[Intel-wired-lan] [PATCH v7 10/12] pps: generators: Add PPS Generator TIO Driver

2024-04-30 Thread lakshmi . sowjanya . d
From: Lakshmi Sowjanya D The Intel Timed IO PPS generator driver outputs a PPS signal using dedicated hardware that is more accurate than software actuated PPS. The Timed IO hardware generates output events using the ART timer. The ART timer period varies based on platform type, but is less than

[Intel-wired-lan] [PATCH v7 09/12] timekeeping: Add function to convert realtime to base clock

2024-04-30 Thread lakshmi . sowjanya . d
From: Lakshmi Sowjanya D PPS (Pulse Per Second) generates a hardware pulse every second based on CLOCK_REALTIME. This works fine when the pulse is generated in software from a hrtimer callback function. For hardware which generates the pulse by programming a timer it's required to convert CLOCK_

[Intel-wired-lan] [PATCH v7 08/12] x86/tsc: Remove art to tsc conversion functions which are obsolete

2024-04-30 Thread lakshmi . sowjanya . d
From: Lakshmi Sowjanya D The convert_art_to_tsc() and convert_art_ns_to_tsc() interfaces are no longer required. This conversion is internally done in get_device_system_crosststamp() using convert_base_to_cs(). Signed-off-by: Lakshmi Sowjanya D --- arch/x86/include/asm/tsc.h | 3 -- arch/x86/

[Intel-wired-lan] [PATCH v7 07/12] ice/ptp: remove convert_art_to_tsc()

2024-04-30 Thread lakshmi . sowjanya . d
From: Thomas Gleixner The core code provides a mechanism to convert the ART base clock to the corresponding TSC value without requiring an architecture specific function. All what is required is to store the ART clocksoure ID and the cycles value in the provided system_counterval structure. Rep

[Intel-wired-lan] [PATCH v7 06/12] ALSA: hda: remove convert_art_to_tsc()

2024-04-30 Thread lakshmi . sowjanya . d
From: Thomas Gleixner The core code provides a mechanism to convert the ART base clock to the corresponding TSC value without requiring an architecture specific function. All what is required is to store the ART clocksoure ID and the cycles value in the provided system_counterval structure. Rep

[Intel-wired-lan] [PATCH v7 05/12] stmmac: intel: remove convert_art_to_tsc()

2024-04-30 Thread lakshmi . sowjanya . d
From: Thomas Gleixner The core code provides a mechanism to convert the ART base clock to the corresponding TSC value without requiring an architecture specific function. All what is required is to store the ART clocksoure ID and the cycles value in the provided system_counterval structure. Rep

[Intel-wired-lan] [PATCH v7 04/12] igc: remove convert_art_ns_to_tsc()

2024-04-30 Thread lakshmi . sowjanya . d
From: Thomas Gleixner The core code provides a mechanism to convert the ART base clock to the corresponding TSC value without requiring an architecture specific function. All what is required is to store the ART clocksoure ID and the cycles value in the provided system_counterval structure. Rep

[Intel-wired-lan] [PATCH v7 03/12] e1000e: remove convert_art_to_tsc()

2024-04-30 Thread lakshmi . sowjanya . d
From: Thomas Gleixner The core code provides a mechanism to convert the ART base clock to the corresponding TSC value without requiring an architecture specific function. Store the ART clocksoure ID and the cycles value in the provided system_counterval structure. Replace the direct conversion

[Intel-wired-lan] [PATCH v7 02/12] x86/tsc: Update tsc/art values in the base clock structure

2024-04-30 Thread lakshmi . sowjanya . d
From: Lakshmi Sowjanya D Add clocksource ID for x86 ART (Always Running Timer). The newly added clocksource ID and conversion parameters are used to convert time in a clocksource domain to base clock and vice versa. Earlier code used architecture specific macros for the conversion, now core code

[Intel-wired-lan] [PATCH v7 01/12] timekeeping: Add base clock properties in clocksource structure

2024-04-30 Thread lakshmi . sowjanya . d
From: Lakshmi Sowjanya D Add base clock hardware abstraction in clocksource structure. Provide generic functionality in convert_base_to_cs() to convert base clock timestamps to system clocksource without requiring architecture specific parameters. This is intended to replace convert_art_to_tsc(

[Intel-wired-lan] [PATCH v7 00/12] Add support for Intel PPS Generator

2024-04-30 Thread lakshmi . sowjanya . d
From: Lakshmi Sowjanya D The goal of the PPS (Pulse Per Second) hardware/software is to generate a signal from the system on a wire so that some third-party hardware can observe that signal and judge how close the system's time is to another system or piece of hardware. Existing methods (like pa