> -Original Message-
> From: Intel-wired-lan On Behalf Of
> Loktionov, Aleksandr
> Sent: Wednesday, November 29, 2023 3:53 PM
> To: intel-wired-...@lists.osuosl.org; Nguyen, Anthony L
> ; Loktionov, Aleksandr
>
> Cc: net...@vger.kernel.org; Staikov, Andrii ;
> Mogilappagari, Sudheer
>
> -Original Message-
> From: Intel-wired-lan On Behalf Of
> Loktionov, Aleksandr
> Sent: Wednesday, November 29, 2023 3:53 PM
> To: intel-wired-...@lists.osuosl.org; Nguyen, Anthony L
> ; Loktionov, Aleksandr
>
> Cc: net...@vger.kernel.org; Staikov, Andrii ;
> Mogilappagari, Sudheer
>
> -Original Message-
> From: Sokolowski, Jan
> Sent: Thursday, December 21, 2023 2:20 AM
> To: Kolacinski, Karol ;
> intel-wired-...@lists.osuosl.org
> Cc: net...@vger.kernel.org; Nguyen, Anthony L ;
> Brandeburg, Jesse ; Keller, Jacob E
> ; Kolacinski, Karol
> Subject: RE: [PATCH v4
> -Original Message-
> From: Staikov, Andrii
> Sent: Thursday, December 21, 2023 6:00 AM
> To: Keller, Jacob E ;
> intel-wired-...@lists.osuosl.org
> Cc: net...@vger.kernel.org; linux-ker...@vger.kernel.org; Ostrowska, Karen
> ; Mateusz Palczewski
> ; Drewek, Wojciech
> ; Kitszel, Przem
Get link status version 2 (opcode 0x0607) is returning an error because FW
expects a data length of 56 bytes, and this is causing the driver to fail
probe.
Update the get link status version 2 data length to 56 bytes by adding 5
byte reserved5 field to the end of struct ice_aqc_get_link_status_dat
On 12/21/2023 2:03 AM, Karol Kolacinski wrote:
Caution: This message originated from an External Source. Use proper caution
when opening attachments, clicking links, or responding.
PTP reset process has multiple places where timestamping can end up in
an incorrect state.
This series introd
> -Original Message-
> From: Simon Horman
> Sent: Thursday, December 21, 2023 4:35 PM
> To: Loktionov, Aleksandr
> Cc: intel-wired-...@lists.osuosl.org; Nguyen, Anthony L
> ; net...@vger.kernel.org; Kitszel,
> Przemyslaw
> Subject: Re: [PATCH iwl-next v2] i40e: add trace events related
On Thu, Dec 21, 2023 at 03:02:54PM +0530, lakshmi.sowjany...@intel.com wrote:
> From: Lakshmi Sowjanya D
>
> Document sysfs interface for Intel Timed I/O PPS driver
...
> +Date:January 2024
> +KernelVersion6.8
No way, use next one.
--
With Best Regards,
Andy Shevchenk
On Thu, Dec 21, 2023 at 03:02:52PM +0530, lakshmi.sowjany...@intel.com wrote:
> From: Lakshmi Sowjanya D
>
> The Intel Timed IO PPS generator driver outputs a PPS signal using
> dedicated hardware that is more accurate than software actuated PPS.
> The Timed IO hardware generates output events us
On Thu, Dec 21, 2023 at 03:02:48PM +0530, lakshmi.sowjany...@intel.com wrote:
> From: Thomas Gleixner
>
> Remove convert_art_to_tsc() function call, Pass system clock cycles and
> clocksource ID as input to get_device_system_crosststamp().
...
> + return (struct system_counterval_t) {
> +
From: Lakshmi Sowjanya D
Document sysfs interface for Intel Timed I/O PPS driver
Signed-off-by: Lakshmi Sowjanya D
---
Documentation/ABI/testing/sysfs-platform-pps-tio | 7 +++
1 file changed, 7 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-platform-pps-tio
diff --git
From: Lakshmi Sowjanya D
Add Intel Timed I/O PPS usage instructions.
Co-developed-by: Pandith N
Signed-off-by: Pandith N
Signed-off-by: Lakshmi Sowjanya D
Reviewed-by: Andy Shevchenko
---
Documentation/driver-api/pps.rst | 22 ++
1 file changed, 22 insertions(+)
diff --
From: Lakshmi Sowjanya D
The Intel Timed IO PPS generator driver outputs a PPS signal using
dedicated hardware that is more accurate than software actuated PPS.
The Timed IO hardware generates output events using the ART timer.
The ART timer period varies based on platform type, but is less than
From: Thomas Gleixner
Remove convert_art_to_tsc() function call, Pass system clock cycles and
clocksource ID as input to get_device_system_crosststamp().
Signed-off-by: Thomas Gleixner
Signed-off-by: Lakshmi Sowjanya D
---
drivers/net/ethernet/intel/ice/ice_ptp.c | 2 +-
1 file changed, 1 ins
From: Thomas Gleixner
Remove convert_art_to_tsc() function call, Pass system clock cycles and
clocksource ID as input to get_device_system_crosststamp().
Signed-off-by: Thomas Gleixner
Signed-off-by: Lakshmi Sowjanya D
---
sound/pci/hda/hda_controller.c | 3 ++-
1 file changed, 2 insertions(+
From: Thomas Gleixner
Remove convert_art_to_tsc() function call, Pass system clock cycles and
clocksource ID as input to get_device_system_crosststamp().
Signed-off-by: Thomas Gleixner
Signed-off-by: Lakshmi Sowjanya D
---
drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c | 3 ++-
1 file chan
From: Thomas Gleixner
Remove convert_art_to_tsc() function call, Pass system clock cycles and
clocksource ID as input to get_device_system_crosststamp().
Signed-off-by: Thomas Gleixner
Signed-off-by: Lakshmi Sowjanya D
---
drivers/net/ethernet/intel/igc/igc_ptp.c | 6 +-
1 file changed, 5
From: Thomas Gleixner
Remove convert_art_to_tsc() function call, Pass system clock cycles and
clocksource ID as input to get_device_system_crosststamp().
Signed-off-by: Thomas Gleixner
Signed-off-by: Lakshmi Sowjanya D
---
drivers/net/ethernet/intel/e1000e/ptp.c | 3 ++-
1 file changed, 2 ins
From: Lakshmi Sowjanya D
Introduce an interface ktime_real_to_base_clock(), to convert realtime
to base clock.
Convert base clock to system clock using convert_base_to_cs() in
get_device_system_crosststamp().
Add a helper function to check whether the current clocksource has same
base clock.
C
From: Lakshmi Sowjanya D
The goal of the PPS(Pulse Per Second) hardware/software is to generate a
signal from the system on a wire so that some third-party hardware can
observe that signal and judge how close the system's time is to another
system or piece of hardware.
Existing methods (like par
From: Lakshmi Sowjanya D
Remove convert_art_to_tsc() and convert_art_ns_to_tsc(), as this patch
series introduces a generic function ktime_real_to_base_clock() to
convert realtime to base clock domain.
Add hardware abstraction, struct clocksource_base in clocksource.
Add clocksource ID for x86
On Wed, Dec 20, 2023 at 06:38:37PM +0100, Aleksandr Loktionov wrote:
> Add trace events related to SFP module IOCTLs for troubleshooting.
>
> Example:
> echo "i40e_*" >/sys/kernel/tracing/set_ftrace_filter
> echo "i40e_ioctl*" >/sys/kernel/tracing/events/i40e/filter
> echo
> The ice driver recently started caching the PCI device structure
> pointers in their VF structure instead of having to do this sort of
> lookup on the fly.
>
> See 31642d2854e2 ("ice: store VF's pci_dev ptr in ice_vf") [1][2]
>
> [1]:
> https://lore.kernel.org/intel-wired-lan/20230912115626.1
> -Original Message-
> From: Intel-wired-lan On Behalf Of
> Arkadiusz Kubalewski
> Sent: Monday, December 18, 2023 8:29 PM
> To: intel-wired-...@lists.osuosl.org
> Cc: Loktionov, Aleksandr ; Kitszel, Przemyslaw
> ; Kubalewski, Arkadiusz
>
> Subject: [Intel-wired-lan] [PATCH iwl-net v2]
On 12/21/23 14:27, Andrii Staikov wrote:
During a PCI FLR the MSI-X Enable flag in the VF PCI MSI-X capability
register will be cleared. This can lead to issues when a VF is
assigned to a VM because in these cases the VF driver receives no
indication of the PF PCI error/reset and additionally it
During a PCI FLR the MSI-X Enable flag in the VF PCI MSI-X capability
register will be cleared. This can lead to issues when a VF is
assigned to a VM because in these cases the VF driver receives no
indication of the PF PCI error/reset and additionally it is incapable
of restoring the cleared flag
On Mon, Dec 18, 2023 at 4:02 PM Arkadiusz Kubalewski
wrote:
>
> Stop dividing the phase_offset value received from firmware. This fault
> is present since the initial implementation.
> The phase_offset value received from firmware is in 0.01ps resolution.
> Dpll subsystem is using the value in 0.0
>From: Jacob Keller
>
>The ice_ptp_reset() function uses a goto to skip past clock owner
>operations if performing a PF reset or if the device is not the clock
>owner. This is a bit confusing. Factor this out into
>ice_ptp_rebuild_owner() instead.
To me at least, the wording of the title (Factor
From: Jacob Keller
The ice driver currently attempts to destroy and re-initialize the Tx
timestamp tracker during the reset flow. The release of the Tx tracker
only happened during CORE reset or GLOBAL reset. The ice_ptp_rebuild()
function always calls the ice_ptp_init_tx function which will allo
From: Jacob Keller
The ice_ptp_reset() function uses a goto to skip past clock owner
operations if performing a PF reset or if the device is not the clock
owner. This is a bit confusing. Factor this out into
ice_ptp_rebuild_owner() instead.
The ice_ptp_reset() function is called by ice_rebuild()
From: Jacob Keller
The ice_ptp_tx_cfg_intr() function sends a control queue message to
configure the PHY timestamp interrupt block. This is a very similar name
to a function which is used to configure the MAC Other Interrupt Cause
Enable register.
Rename this function to ice_ptp_cfg_phy_interrup
From: Jacob Keller
The tx->verify_cached flag is used to inform the Tx timestamp tracking
code whether it needs to verify the cached Tx timestamp value against
a previous captured value. This is necessary on E810 hardware which does
not have a Tx timestamp ready bitmap.
In addition, we currently
From: Jacob Keller
The ice_ptp_prepare_for_reset() and ice_ptp_reset() functions currently
check the pf->flags ICE_FLAG_PFR_REQ bit to determine if the current
reset is a PF reset or not.
This is problematic, because it is possible that a PF reset and a higher
level reset (CORE reset, GLOBAL res
Add PTP state machine so that the driver can correctly identify PTP
state around resets.
When the driver got information about ungraceful reset, PTP was not
prepared for reset and it returned error. When this situation occurs,
prepare PTP before rebuilding its structures.
Signed-off-by: Jacob Kell
PTP reset process has multiple places where timestamping can end up in
an incorrect state.
This series introduces a proper state machine for PTP and refactors
a large part of the code to ensure that timestamping does not break.
Jacob Keller (5):
ice: pass reset type to PTP reset functions
ic
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