y the state
structure data in first page.
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_drv.c| 13 +
drivers/gpu/drm/i915/i915_guc_submission.c | 87 ++
drivers/gpu/drm/i915/i915_irq.c| 6 ++-
dr
From: Akash Goel
So far there were 2 fields related to GuC logs in 'intel_guc' structure.
For the support of capturing GuC logs & storing them in a local buffer,
multiple new fields would have to be added. This warrants a separate
structure to contain the fields related to GuC
verbosity info.
v2: Add a forceful flush, to collect left over logs, on disabling logging.
Useful for Validation.
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_debugfs.c| 32 -
drivers/gpu/drm/i915/i915_guc_submission.c | 57
buffer state structure more elaborate. (Tvrtko)
Rename LOGBUFFERFLUSH action to LOG_BUFFER_FLUSH for consistency. (Tvrtko)
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/intel_guc_fwif.h | 64 +++
1 file changed, 64
From: Akash Goel
GuC firmware log its debug messages into a Host-GuC shared memory buffer
and when the buffer is half full it sends a Flush interrupt to Host.
GuC firmware expects that while it is writing to 2nd half of the buffer,
first half would get consumed by Host and then get a flush
From: Akash Goel
On recieving the log buffer flush interrupt from GuC firmware, Driver
stores the snapshot of the log buffer in a local buffer, from which
Userspace can pull the logs. By default Driver store, up to, 4 snapshots
of the log buffer in a local buffer (managed by relay).
Added a new
From: Akash Goel
GuC firmware sends an interrupt to flush the log buffer when it becomes
half full, so Driver doesn't really need to sample the complete buffer
and can just copy only the newly written data by GuC into the local
buffer, i.e. as per the read & write pointer values.
Mor
From: Akash Goel
Host needs to sample the GuC log buffer on every flush interrupt from GuC.
To ensure that we always get the up-to-date data from log buffer, its
better to access the buffer through an uncached CPU mapping. Also the way
buffer is accessed from GuC & Host side, manually d
From: Akash Goel
Added a new debugfs interface '/sys/kernel/debug/dri/guc_log' for the
User to capture GuC firmware logs. Availed relay framework to implement
the interface, where Driver will have to just use a relay API to store
snapshots of the GuC log buffer in the buffer manage
v2: Remove the redundant braces around pin count check and fix the marker
in documentation (Chris)
Signed-off-by: Chris Wilson
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_drv.h | 4 ++-
drivers/gpu/drm/i915/i915_gem.c | 57 +
drive
From: Akash Goel
GuC firmware sends an interrupt to flush the log buffer when it
becomes half full. GuC firmware also tracks how many times the
buffer overflowed.
It would be useful to maintain a statistics of how many flush
interrupts were received and for which type of log buffer,
along with
From: Akash Goel
With the addition of new Host2GuC actions related to GuC logging, there
is a need of a lock to serialize them, as they can execute concurrently
with each other and also with other existing actions.
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_guc_submission.c | 3
: Akash Goel
---
drivers/gpu/drm/i915/i915_guc_submission.c | 32 ++
drivers/gpu/drm/i915/i915_irq.c| 2 ++
drivers/gpu/drm/i915/intel_guc.h | 1 +
3 files changed, 35 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c
b
From: Akash Goel
So far PM IER/IIR/IMR registers were being used only for Turbo related
interrupts. But interrupts coming from GuC also use the same set.
As a precursor to supporting GuC interrupts, added new low level routines
so as to allow sharing the programming of PM IER/IIR/IMR registers
-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_drv.h| 1 +
drivers/gpu/drm/i915/i915_guc_submission.c | 5 ++
drivers/gpu/drm/i915/i915_irq.c| 108 +++--
drivers/gpu/drm/i915/i915_reg.h| 11 +++
drivers/gpu/drm/i915/intel_d
verbosity info.
v2: Add a forceful flush, to collect left over logs, on disabling logging.
Useful for Validation.
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_debugfs.c| 32 -
drivers/gpu/drm/i915/i915_guc_submission.c | 57
From: Akash Goel
On recieving the log buffer flush interrupt from GuC firmware, Driver
stores the snapshot of the log buffer in a local buffer, from which
Userspace can pull the logs. By default Driver store, up to, 4 snapshots
of the log buffer in a local buffer (managed by relay).
Added a new
d on
the value of module paramter guc_log_level.
v2: Update commit message to describe the constraint with allocation of
log buffer at runtime. (Tvrtko)
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_guc_submission.c | 3 ---
drivers/gpu/drm/
From: Akash Goel
Added a new debugfs interface '/sys/kernel/debug/dri/guc_log' for the
User to capture GuC firmware logs. Availed relay framework to implement
the interface, where Driver will have to just use a relay API to store
snapshots of the GuC log buffer in the buffer manage
From: Akash Goel
Host needs to sample the GuC log buffer on every flush interrupt from GuC.
To ensure that we always get the up-to-date data from log buffer, its
better to access the buffer through an uncached CPU mapping. Also the way
buffer is accessed from GuC & Host side, manually d
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_guc_submission.c | 32 ++
drivers/gpu/drm/i915/i915_irq.c| 2 ++
drivers/gpu/drm/i915/intel_guc.h | 1 +
3 files changed, 35 insertions(+)
diff --git a/drivers/gpu/drm/i915
- Rename guc_events to pm_guc_events so as to be indicative of the
register/control block it is associated with. (Chris)
- Add handling for back to back log buffer flush interrupts.
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_drv.h| 1 +
dri
by: Sagar Arun Kamble
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_drv.c| 13 +++
drivers/gpu/drm/i915/i915_guc_submission.c | 148 +
drivers/gpu/drm/i915/i915_irq.c| 5 +-
drivers/gpu/drm/i915/intel_guc.h | 3 +
4 file
v2: Remove the redundant braces around pin count check and fix the marker
in documentation (Chris)
Signed-off-by: Chris Wilson
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_drv.h| 4 ++-
drivers/gpu/drm/i915/i915_gem.c| 57 +++---
d
From: Akash Goel
GuC firmware sends an interrupt to flush the log buffer when it
becomes half full. GuC firmware also tracks how many times the
buffer overflowed.
It would be useful to maintain a statistics of how many flush
interrupts were received and for which type of log buffer,
along with
From: Akash Goel
In cases where GuC generate logs at a very high rate, correspondingly
the rate of flush interrupts is also very high.
So far total 8 pages were allocated for storing both ISR & DPC logs.
As per the half-full draining protocol followed by GuC, by doubling
the number of pages,
From: Akash Goel
With the addition of new Host2GuC actions related to GuC logging, there
is a need of a lock to serialize them, as they can execute concurrently
with each other and also with other existing actions.
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_guc_submission.c | 3
From: Akash Goel
So far PM IER/IIR/IMR registers were being used only for Turbo related
interrupts. But interrupts coming from GuC also use the same set.
As a precursor to supporting GuC interrupts, added new low level routines
so as to allow sharing the programming of PM IER/IIR/IMR registers
From: Akash Goel
GuC firmware log its debug messages into a Host-GuC shared memory buffer
and when the buffer is half full it sends a Flush interrupt to Host.
GuC firmware follows the half-full draining protocol where it expects that
while it is writing to 2nd half of the buffer, first half
buffer state structure more elaborate. (Tvrtko)
Rename LOGBUFFERFLUSH action to LOG_BUFFER_FLUSH for consistency. (Tvrtko)
v3: Add GuC log buffer layout diagram for more clarity.
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915
From: Akash Goel
So far there were 2 fields related to GuC logs in 'intel_guc' structure.
For the support of capturing GuC logs & storing them in a local buffer,
multiple new fields would have to be added. This warrants a separate
structure to contain the fields related to GuC
From: Akash Goel
GuC firmware sends an interrupt to flush the log buffer when it becomes
half full, so Driver doesn't really need to sample the complete buffer
and can just copy only the newly written data by GuC into the local
buffer, i.e. as per the read & write pointer values.
Mor
From: Akash Goel
In cases where GuC firmware generates logs at a very high rate, Driver too
needs to be fast enough to sample the log buffer in time for the half-full
draining protocol to be effective and prevent any overflows of log buffer.
So the scheduling latency of bottom half, where
buffer state structure more elaborate. (Tvrtko)
Rename LOGBUFFERFLUSH action to LOG_BUFFER_FLUSH for consistency. (Tvrtko)
v3: Add GuC log buffer layout diagram for more clarity.
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915
From: Akash Goel
So far there were 2 fields related to GuC logs in 'intel_guc' structure.
For the support of capturing GuC logs & storing them in a local buffer,
multiple new fields would have to be added. This warrants a separate
structure to contain the fields related to GuC
From: Akash Goel
So far PM IER/IIR/IMR registers were being used only for Turbo related
interrupts. But interrupts coming from GuC also use the same set.
As a precursor to supporting GuC interrupts, added new low level routines
so as to allow sharing the programming of PM IER/IIR/IMR registers
igned-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_drv.h| 1 +
drivers/gpu/drm/i915/i915_guc_submission.c | 5 ++
drivers/gpu/drm/i915/i915_irq.c| 100 +++--
drivers/gpu/drm/i915/i915_reg.h| 11 +
From: Akash Goel
GuC firmware log its debug messages into a Host-GuC shared memory buffer
and when the buffer is half full it sends a Flush interrupt to Host.
GuC firmware follows the half-full draining protocol where it expects that
while it is writing to 2nd half of the buffer, first half
d on
the value of module paramter guc_log_level.
v2: Update commit message to describe the constraint with allocation of
log buffer at runtime. (Tvrtko)
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_guc_submission.c
stroy the wq under the same condition in which it was created,
pass dev_piv pointer instead of dev to newly added GuC function,
add more comments & rename variable for clarity. (Tvrtko)
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_drv.c
From: Akash Goel
Added a new debugfs interface '/sys/kernel/debug/dri/guc_log' for the
User to capture GuC firmware logs. Availed relay framework to implement
the interface, where Driver will have to just use a relay API to store
snapshots of the GuC log buffer in the buffer manage
From: Akash Goel
With the addition of new Host2GuC actions related to GuC logging, there
is a need of a lock to serialize them, as they can execute concurrently
with each other and also with other existing actions.
v2: Use mutex in place of spinlock to serialize, as sleep can happen
while
From: Akash Goel
GuC firmware sends an interrupt to flush the log buffer when it
becomes half full. GuC firmware also tracks how many times the
buffer overflowed.
It would be useful to maintain a statistics of how many flush
interrupts were received and for which type of log buffer,
along with
From: Akash Goel
relay essentially needs to maintain the per CPU array of channel buffer
pointers but it manually creates that array.
Instead its better to avail the per CPU constructs, provided by the
kernel, to allocate & access the array of pointer to channel buffers.
v2: Include in rel
particularly useful to understand
that why the GPU reset was initiated.
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_gpu_error.c | 2 ++
drivers/gpu/drm/i915/i915_guc_submission.c | 27 +++
drivers/gpu/drm/i915/intel_guc.h
From: Akash Goel
In order to have fast reads from the GuC log buffer, used SSE4.1 movntdqa
based memcpy function i915_memcpy_from_wc.
GuC log buffer has a WC type vmalloc mapping and copying using movntqda from
WC type memory is almost as fast as reading from WB memory.
This will further reduce
ntqda, use kernel_fpu_begin.
Signed-off-by: Chris Wilson
Cc: Akash Goel
Cc: Damien Lespiau
Cc: Mika Kuoppala
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/Makefile | 3 ++
drivers/gpu/drm/i915/i915_drv.c| 2 +
drivers/gpu/drm/i915/i915_drv.h| 3 ++
drivers/gpu/drm/i915/i915_memc
From: Akash Goel
Host needs to sample the GuC log buffer on every flush interrupt from GuC.
To ensure that we always get the up-to-date data from log buffer, its
better to access the buffer through an uncached CPU mapping. Also the way
buffer is accessed from GuC & Host side, manually d
From: Akash Goel
GuC firmware sends an interrupt to flush the log buffer when it becomes
half full, so Driver doesn't really need to sample the complete buffer
and can just copy only the newly written data by GuC into the local
buffer, i.e. as per the read & write pointer values.
Mor
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_debugfs.c| 44 -
drivers/gpu/drm/i915/i915_guc_submission.c | 63 ++
drivers/gpu/drm/i915/intel_guc.h | 1 +
3 files changed, 107 insertions(+), 1 deletion(-)
diff --git a/drivers
From: Akash Goel
As per the current i915 Driver load sequence, debugfs registration is done
at the end and so the relay channel debugfs file is also created after that
but the GuC firmware is loaded much earlier in the sequence.
As a result Driver could miss capturing the boot-time logs of GuC
From: Akash Goel
In cases where GuC generate logs at a very high rate, correspondingly
the rate of flush interrupts is also very high.
So far total 8 pages were allocated for storing both ISR & DPC logs.
As per the half-full draining protocol followed by GuC, by doubling
the number of pages,
rfluous BUG_ON.(Tvrtko)
v4:
- Rename the enums and clean up the pin_map function. (Chris)
Signed-off-by: Chris Wilson
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_drv.h| 9 -
drivers/gpu/drm/i915/i915_gem.c| 58 +++---
driver
From: Akash Goel
Added the dump of GuC log buffer to i915 error state, as the contents of
GuC log buffer would also be useful to determine that why the GPU reset
was triggered.
Suggested-by: Chris Wilson
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu
From: Akash Goel
So far PM IER/IIR/IMR registers were being used only for Turbo related
interrupts. But interrupts coming from GuC also use the same set.
As a precursor to supporting GuC interrupts, added new low level routines
so as to allow sharing the programming of PM IER/IIR/IMR registers
From: Akash Goel
relay essentially needs to maintain the per CPU array of channel buffer
pointers but it manually creates that array.
Instead its better to avail the per CPU constructs, provided by the
kernel, to allocate & access the array of pointer to channel buffers.
v2: Include in rel
From: Akash Goel
So far there were 2 fields related to GuC logs in 'intel_guc' structure.
For the support of capturing GuC logs & storing them in a local buffer,
multiple new fields would have to be added. This warrants a separate
structure to contain the fields related to GuC
particularly useful to
understand that why the GPU reset was initiated.
v2:
- Avoid the wait via flush_work, to serialize against an ongoing log
buffer flush, from the error state capture path. (Chris)
- Rebase.
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915
From: Akash Goel
Added the dump of GuC log buffer to i915 error state, as the contents of
GuC log buffer would also be useful to determine that why the GPU reset
was triggered.
v2:
- For uniformity use existing helper function print_error_obj() to
dump out contents of GuC log buffer, pretty
From: Akash Goel
In order to have fast reads from the GuC log buffer, used SSE4.1 movntdqa
based memcpy function i915_memcpy_from_wc.
GuC log buffer has a WC type vmalloc mapping and copying using movntqda
from WC type memory is almost as fast as reading from WB memory.
This will further reduce
n routines of GuC logging. (Chris)
- Validate the log buffer size value retrieved from state structure
and do some minor cleanup. (Tvrtko)
- Fix error/warnings reported by checkpatch. (Tvrtko)
- Rebase.
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_guc_s
From: Akash Goel
GuC firmware log its debug messages into a Host-GuC shared memory buffer
and when the buffer is half full it sends a Flush interrupt to Host.
GuC firmware follows the half-full draining protocol where it expects that
while it is writing to 2nd half of the buffer, first half
d on
the value of module parameter guc_log_level.
v2: Update commit message to describe the constraint with allocation of
log buffer at runtime. (Tvrtko)
v3: Rebase.
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/
From: Akash Goel
In cases where GuC generate logs at a very high rate, correspondingly
the rate of flush interrupts is also very high.
So far total 8 pages were allocated for storing both ISR & DPC logs.
As per the half-full draining protocol followed by GuC, by doubling
the number of pages,
From: Akash Goel
With the addition of new Host2GuC actions related to GuC logging, there
is a need of a lock to serialize them, as they can execute concurrently
with each other and also with other existing actions.
v2: Use mutex in place of spinlock to serialize, as sleep can happen
while
From: Akash Goel
Added a new debugfs interface '/sys/kernel/debug/dri/guc_log' for the
User to capture GuC firmware logs. Availed relay framework to implement
the interface, where Driver will have to just use a relay API to store
snapshots of the GuC log buffer in the buffer manage
:
- Move the log buffer flush interrupt related stuff to the following
patch so as to do only generic bits in this patch. (Tvrtko)
- Rebase.
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_drv.h| 1 +
drivers/gpu/drm/i915/i915_guc_submi
From: Akash Goel
Host needs to sample the GuC log buffer on every flush interrupt from GuC.
To ensure that we always get the up-to-date data from log buffer, its
better to access the buffer through an uncached CPU mapping. Also the way
buffer is accessed from GuC & Host side, manually d
From: Akash Goel
GuC firmware sends an interrupt to flush the log buffer when it
becomes half full. GuC firmware also tracks how many times the
buffer overflowed.
It would be useful to maintain a statistics of how many flush
interrupts were received and for which type of log buffer,
along with
rtko)
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_debugfs.c| 44 -
drivers/gpu/drm/i915/i915_guc_submission.c | 62 ++
drivers/gpu/drm/i915/intel_guc.h | 1 +
3 files changed, 106 insert
From: Akash Goel
GuC firmware sends an interrupt to flush the log buffer when it becomes
half full, so Driver doesn't really need to sample the complete buffer
and can just copy only the newly written data by GuC into the local
buffer, i.e. as per the read & write pointer values.
Mor
buffer state structure more elaborate &
rename LOGBUFFERFLUSH action to LOG_BUFFER_FLUSH for consistency.(Tvrtko)
v3: Add GuC log buffer layout diagram for more clarity.
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/
From: Akash Goel
As per the current i915 Driver load sequence, debugfs registration is done
at the end and so the relay channel debugfs file is also created after that
but the GuC firmware is loaded much earlier in the sequence.
As a result Driver could miss capturing the boot-time logs of GuC
From: Akash Goel
So far PM IER/IIR/IMR registers were being used only for Turbo related
interrupts. But interrupts coming from GuC also use the same set.
As a precursor to supporting GuC interrupts, added new low level routines
so as to allow sharing the programming of PM IER/IIR/IMR registers
From: Akash Goel
GuC firmware log its debug messages into a Host-GuC shared memory buffer
and when the buffer is half full it sends a Flush interrupt to Host.
GuC firmware follows the half-full draining protocol where it expects that
while it is writing to 2nd half of the buffer, 1st half would
d on
the value of module parameter guc_log_level.
v2: Update commit message to describe the constraint with allocation of
log buffer at runtime. (Tvrtko)
v3: Rebase.
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/
From: Akash Goel
So far there were 2 fields related to GuC logs in 'intel_guc' structure.
For the support of capturing GuC logs & storing them in a local buffer,
multiple new fields would have to be added. This warrants a separate
structure to contain the fields related to GuC
buffer state structure more elaborate &
rename LOGBUFFERFLUSH action to LOG_BUFFER_FLUSH for consistency.(Tvrtko)
v3: Add GuC log buffer layout diagram for more clarity.
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/
the log packet,
as much possible and let Userspace parser detect the anomaly. (Chris)
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_guc_submission.c | 186 +
drivers/gpu/drm/i915/i915_irq.c| 28 -
driver
From: Akash Goel
With the addition of new Host2GuC actions related to GuC logging, there
is a need of a lock to serialize them, as they can execute concurrently
with each other and also with other existing actions.
v2: Use mutex in place of spinlock to serialize, as sleep can happen
while
nst the work queued by irq handler will be done by caller disabling
the interrupt.
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_drv.h| 1 +
drivers/gpu/drm/i915/i915_guc_submission.c | 5 +++
drivers/gpu/drm/i915/i915_irq.c
From: Akash Goel
relay essentially needs to maintain the per CPU array of channel buffer
pointers but it manually creates that array.
Instead its better to avail the per CPU constructs, provided by the
kernel, to allocate & access the array of pointer to channel buffers.
v2: Include in rel
From: Akash Goel
Added a new debugfs interface '/sys/kernel/debug/dri/guc_log' for the
User to capture GuC firmware logs. Availed relay framework to implement
the interface, where Driver will have to just use a relay API to store
snapshots of the GuC log buffer in the buffer manage
particularly useful to
understand that why the GPU reset was initiated.
v2:
- Avoid the wait via flush_work, to serialize against an ongoing log
buffer flush, from the error state capture path. (Chris)
- Rebase.
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915
From: Akash Goel
In cases where GuC generate logs at a very high rate, correspondingly
the rate of flush interrupts is also very high.
So far total 8 pages were allocated for storing both ISR & DPC logs.
As per the half-full draining protocol followed by GuC, by doubling
the number of pages,
From: Akash Goel
Added the dump of GuC log buffer to i915 error state, as the contents of
GuC log buffer would also be useful to determine that why the GPU reset
was triggered.
v2:
- For uniformity use existing helper function print_error_obj() to
dump out contents of GuC log buffer, pretty
From: Akash Goel
GuC firmware sends an interrupt to flush the log buffer when it becomes
half full, so Driver doesn't really need to sample the complete buffer
and can just copy only the newly written data by GuC into the local
buffer, i.e. as per the read & write pointer values.
Mor
From: Akash Goel
GuC firmware sends an interrupt to flush the log buffer when it
becomes half full. GuC firmware also tracks how many times the
buffer overflowed.
It would be useful to maintain a statistics of how many flush
interrupts were received and for which type of log buffer,
along with
From: Akash Goel
In order to have fast reads from the GuC log buffer, used SSE4.1 movntdqa
based memcpy function i915_memcpy_from_wc.
GuC log buffer has a WC type vmalloc mapping and copying using movntqda
from WC type memory is almost as fast as reading from WB memory.
This will further reduce
rtko)
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_debugfs.c| 44 -
drivers/gpu/drm/i915/i915_guc_submission.c | 62 ++
drivers/gpu/drm/i915/intel_guc.h | 1
From: Akash Goel
The GuC log buffer flush work item does a register access to send the ack
to GuC and this work item, if not synced before suspend, can potentially
get executed after the GFX device is suspended.
The work item function uses rpm_get/rpm_put calls around the Hw access,
this covers
From: Akash Goel
Host needs to sample the GuC log buffer on every flush interrupt from GuC.
To ensure that we always get the up-to-date data from log buffer, its
better to access the buffer through an uncached CPU mapping. Also the way
buffer is accessed from GuC & Host side, manually d
From: Akash Goel
As per the current i915 Driver load sequence, debugfs registration is done
at the end and so the relay channel debugfs file is also created after that
but the GuC firmware is loaded much earlier in the sequence.
As a result Driver could miss capturing the boot-time logs of GuC
From: Akash Goel
So far PM IER/IIR/IMR registers were being used only for Turbo related
interrupts. But interrupts coming from GuC also use the same set.
As a precursor to supporting GuC interrupts, added new low level routines
so as to allow sharing the programming of PM IER/IIR/IMR registers
better readability. (Tvrtko)
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/i915_guc_submission.c | 189 +
drivers/gpu/drm/i915/i915_irq.c| 28 -
drivers/gpu/drm/i915/intel_guc.h | 4 +
3 files changed, 22
From: Akash Goel
GuC firmware log its debug messages into a Host-GuC shared memory buffer
and when the buffer is half full it sends a Flush interrupt to Host.
GuC firmware follows the half-full draining protocol where it expects that
while it is writing to 2nd half of the buffer, 1st half would
d on
the value of module parameter guc_log_level.
v2: Update commit message to describe the constraint with allocation of
log buffer at runtime. (Tvrtko)
v3: Rebase.
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/
nst the work queued by irq handler will be done by caller disabling
the interrupt.
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Akash Goel
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h| 1 +
drivers/gpu/drm/i915/i915_guc_submission.c | 5 +++
drivers/
From: Akash Goel
Added a new debugfs interface '/sys/kernel/debug/dri/guc_log' for the
User to capture GuC firmware logs. Availed relay framework to implement
the interface, where Driver will have to just use a relay API to store
snapshots of the GuC log buffer in the buffer manage
From: Akash Goel
So far there were 2 fields related to GuC logs in 'intel_guc' structure.
For the support of capturing GuC logs & storing them in a local buffer,
multiple new fields would have to be added. This warrants a separate
structure to contain the fields related to GuC
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