[Intel-gfx] [PATCH i-g-t] [RFC] tests/kms_plane_alpha_blend: Fix coverage-vs-premult-vs-constant tests

Few Gen11 systems show CRC mismatch. Make coverage-vs-premult-vs-constant code similar to constant_alpha_min or basic_alpha Signed-off-by: Vidya Srinivas --- tests/kms_plane_alpha_blend.c | 4 1 file changed, 4 deletions(-) diff --git a/tests/kms_plane_alpha_blend.c b/tests

[Intel-gfx] [PATCH i-g-t] [RFC] tests/kms_plane_alpha_blend: Don't set primary fb color in coverage-vs-premult-vs-constant

: Vidya Srinivas --- tests/kms_plane_alpha_blend.c | 4 1 file changed, 4 deletions(-) diff --git a/tests/kms_plane_alpha_blend.c b/tests/kms_plane_alpha_blend.c index a37cb27c7d62..224d79bd1749 100644 --- a/tests/kms_plane_alpha_blend.c +++ b/tests/kms_plane_alpha_blend.c @@ -447,10 +447,6

[Intel-gfx] [PATCH] [RFC] drm/vgem: Fix the pitch to be 64 byte aligned for Intel platforms

: igt/kms_prime with panel resolution 1366x768 Change-Id: If68914421b1a9432a73af96c8b426045772629eb Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/vgem/vgem_drv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/vgem/vgem_drv.c b/drivers/gpu/drm/vgem

[Intel-gfx] [PATCH i-g-t] tests/kms_color: Remove gamma code from degamma tests

CRC should be collected without degamma transformation and after drawing gradient with degamma LUT. This patch removes things which are not related to degamma and makes it similar to pipe gamma test. Change-Id: I37f957b3a95dfe95119f0f0941f20c10471f437c Signed-off-by: Vidya Srinivas --- tests

[Intel-gfx] [PATCH i-g-t] tests/kms_color: Remove gamma code from degamma tests

CRC should be collected without degamma transformation and after drawing gradient with degamma LUT. This patch removes things which are not related to degamma and makes it similar to pipe gamma test. Signed-off-by: Vidya Srinivas --- tests/kms_color.c | 16 ++-- 1 file changed, 6

[Intel-gfx] [PATCH] tests/kms_color: Disable gamma in degamma tests

This patch disables gamma in degamma subtest which is missing. It compares CRC between (linear degamma + solid colors) and (max degamma + gradient colors). v2 - Addressed review comments from Bhanuprakash Modem Signed-off-by: Vidya Srinivas Change-Id: Ibdb91b603e2e4024d170727d24c6a5425441e2e1

[Intel-gfx] [PATCH i-g-t] tests/kms_color: Disable gamma in degamma tests

Bhanuprakash Modem Changed full degamma for reference CRC to linear degamma Added clean up of degamma end of degamma test. v3 - Addressed review comments from Bhanuprakash Modem Ported changes to kms_color_chamelium Change-Id: Ibdb91b603e2e4024d170727d24c6a5425441e2e1 Signed-off-by: Vidya Srinivas

[Intel-gfx] [PATCH i-g-t 2/2] tests/kms_color_chamelium: Disable gamma in degamma tests

This patch disables gamma in degamma subtest which is missing. It compares CRC between (linear degamma + solid colors) and (max degamma + gradient colors). Patch also cleans up degamma before exiting degamma test and cleans up gamma before exiting gamma test. Signed-off-by: Vidya Srinivas

[Intel-gfx] [PATCH i-g-t 1/2] tests/kms_color: Disable gamma in degamma tests

Bhanuprakash Modem Changed full degamma for reference CRC to linear degamma Added clean up of degamma end of degamma test. v3 - Addressed review comments from Bhanuprakash Modem Fixed comments Change-Id: Ibdb91b603e2e4024d170727d24c6a5425441e2e1 Signed-off-by: Vidya Srinivas --- tests/kms_color.c

[Intel-gfx] [PATCH i-g-t 1/2] tests/kms_color: Disable gamma in degamma tests

Bhanuprakash Modem Changed full degamma for reference CRC to linear degamma Added clean up of degamma end of degamma test. v3 - Addressed review comments from Bhanuprakash Modem Fixed comments Change-Id: Ibdb91b603e2e4024d170727d24c6a5425441e2e1 Signed-off-by: Vidya Srinivas --- tests/kms_color.c

[Intel-gfx] [PATCH i-g-t] tests/kms_color_chamelium: Disable gamma in degamma tests

This patch disables gamma in degamma subtest which is missing. It compares CRC between (linear degamma + solid colors) and (max degamma + gradient colors). Patch also cleans up degamma before exiting degamma test and cleans up gamma before exiting gamma test. Signed-off-by: Vidya Srinivas

[Intel-gfx] [PATCH i-g-t 1/2] tests/kms_color: Disable gamma in degamma tests

Bhanuprakash Modem Changed full degamma for reference CRC to linear degamma Added clean up of degamma end of degamma test. v3 - Addressed review comments from Bhanuprakash Modem Fixed comments Change-Id: Ibdb91b603e2e4024d170727d24c6a5425441e2e1 Signed-off-by: Vidya Srinivas --- tests/kms_color.c

[Intel-gfx] [PATCH i-g-t] tests/kms_color_chamelium: Disable gamma in degamma tests

This patch disables gamma in degamma subtest which is missing. It compares CRC between (linear degamma + solid colors) and (max degamma + gradient colors). Patch also cleans up degamma before exiting degamma test and cleans up gamma before exiting gamma test. Signed-off-by: Vidya Srinivas

[Intel-gfx] [PATCH i-g-t 0/2] Disable gamma in degamma subtests

kms_color and kms_color_chamelium. Vidya Srinivas (2): tests/kms_color: Disable gamma in degamma tests tests/kms_color_chamelium: Disable gamma in degamma tests tests/kms_color.c | 14 +++--- tests/kms_color_chamelium.c | 14 +++--- 2 files changed, 14 insertions(+), 14

[Intel-gfx] [PATCH i-g-t 1/2] tests/kms_color: Disable gamma in degamma tests

Bhanuprakash Modem Changed full degamma for reference CRC to linear degamma Added clean up of degamma end of degamma test. v3 - Addressed review comments from Bhanuprakash Modem Fixed comments Change-Id: Ibdb91b603e2e4024d170727d24c6a5425441e2e1 Signed-off-by: Vidya Srinivas --- tests/kms_color.c

[Intel-gfx] [PATCH i-g-t 2/2] tests/kms_color_chamelium: Disable gamma in degamma tests

This patch disables gamma in degamma subtest which is missing. It compares CRC between (linear degamma + solid colors) and (max degamma + gradient colors). Patch also cleans up degamma before exiting degamma test and cleans up gamma before exiting gamma test. Signed-off-by: Vidya Srinivas

[Intel-gfx] [PATCH i-g-t] tests/kms_big_fb: Wait for vblank before collecting CRC

Without wait for vblank, CRC mismatch is seen between big and small CRC on few systems Change-Id: I3bec931aa901130997e693ac1cacf389e2a8100f Signed-off-by: Vidya Srinivas --- tests/kms_big_fb.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/tests/kms_big_fb.c b/tests

[Intel-gfx] [PATCH i-g-t] tests/drm_read: drm_read fails for subtest invalid-buffer on chrome

to EINTR instead of EFAULT Change-Id: I5f844af087c9826fcbcfbe301f0df5f727cb013b Signed-off-by: Vidya Srinivas --- tests/drm_read.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/drm_read.c b/tests/drm_read.c index ccf9d822fd8d..a8816bc1e587 100644 --- a/tests

[Intel-gfx] [PATCH 4/4] [RFC] tests/kms_big_fb: Wait for vblank before collecting CRC

Without wait for vblank, CRC mismatch is seen between big and small CRC on some intel Gen11 platforms. Change-Id: I3bec931aa901130997e693ac1cacf389e2a8100f Signed-off-by: Vidya Srinivas --- tests/kms_big_fb.c | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/tests

[Intel-gfx] [PATCH 1/4] [RFC] tests/drm_read: Fix subtest invalid-buffer

-off-by: Vidya Srinivas Change-Id: I97f129e586bf9212eb0a63a4cd4c91e0327dd550 --- tests/drm_read.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tests/drm_read.c b/tests/drm_read.c index ccf9d822fd8d..2fdec5be4078 100644 --- a/tests/drm_read.c +++ b/tests/drm_read.c @@ -103,10

[Intel-gfx] [PATCH 2/4] [RFC] tests/kms_prime: Aligned pitch to 64 byte for Intel platforms

resolution 1366x768 Signed-off-by: Vidya Srinivas Change-Id: Ie8f938b9672127537f433a5674b60e88275cc2c7 --- tests/kms_prime.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/tests/kms_prime.c b/tests/kms_prime.c index 8cb2ca2a9dc3..fdc941fe8100 100644 --- a/tests/kms_prime.c

[Intel-gfx] [PATCH 3/4] [RFC] tests/kms_color: Fix pipe degamma subtests

We need to collect CRC with no degamma transformation and after drawing gradient with degamma LUT. This patch makes subtest pipe degamma code similar to pipe gamma is written. Change-Id: Iee70f01c0ae25ee873e5dc6a327a28b6ac1ea13a Signed-off-by: Vidya Srinivas --- tests/kms_color.c | 12

[Intel-gfx] [PATCH] [RFC] tests/kms_flip: Some Gen11 systems are not able to get RTC WAKE work well. SUSPEND_TEST_NONE goes to RTC Wake. Instead change it to SUSPEND_TEST_PLATFORM.

Change-Id: I80930185a8799578bbec0123a389074af1edfb5d Signed-off-by: Vidya Srinivas --- tests/kms_flip.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/kms_flip.c b/tests/kms_flip.c index 64907c2c17a5..4d45dd77e9d9 100755 --- a/tests/kms_flip.c +++ b/tests/kms_flip.c

[Intel-gfx] [PATCH] [RFC] tests/kms_big_fb: Wait for vblank before collecting CRC

Without wait for vblank, CRC mismatch is seen between big and small CRC on some Gen11 systems Change-Id: I3bec931aa901130997e693ac1cacf389e2a8100f Signed-off-by: Vidya Srinivas --- tests/kms_big_fb.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/tests/kms_big_fb.c b

[Intel-gfx] [PATCH i-g-t] [RFC] tests/kms_flip: Some Gen11 systems are not able to get RTC WAKE work well. SUSPEND_TEST_NONE goes to RTC Wake. Instead change it to SUSPEND_TEST_PLATFORM.

Change-Id: I80930185a8799578bbec0123a389074af1edfb5d Signed-off-by: Vidya Srinivas --- tests/kms_flip.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tests/kms_flip.c b/tests/kms_flip.c index 64907c2c17a5..42a3048cc11a 100755 --- a/tests/kms_flip.c +++ b/tests/kms_flip.c

[Intel-gfx] [PATCH i-g-t] [RFC] tests/kms_big_fb: Wait for vblank before collecting CRC

Without wait for vblank, CRC mismatch is seen between big and small CRC on few Gen11 systems. Change-Id: I3bec931aa901130997e693ac1cacf389e2a8100f Signed-off-by: Vidya Srinivas --- tests/kms_big_fb.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/tests/kms_big_fb.c b

[Intel-gfx] [PATCH i-g-t] [RFC] tests/kms_flip: Some Gen11 systems are not able to get RTC WAKE work well. SUSPEND_TEST_NONE goes to RTC Wake. Instead change it to SUSPEND_TEST_PLATFORM.

Change-Id: I80930185a8799578bbec0123a389074af1edfb5d Signed-off-by: Vidya Srinivas --- tests/kms_flip.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tests/kms_flip.c b/tests/kms_flip.c index 8f736652be90..8afac88c9b15 100755 --- a/tests/kms_flip.c +++ b/tests/kms_flip.c

[Intel-gfx] [PATCH i-g-t] [RFC] tests/kms_big_fb: Wait for vblank before collecting CRC

Without wait for vblank, CRC mismatch is seen between big and small CRC on few Gen11 systems. Change-Id: I3bec931aa901130997e693ac1cacf389e2a8100f Signed-off-by: Vidya Srinivas --- tests/kms_big_fb.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/tests/kms_big_fb.c b

[Intel-gfx] [PATCH i-g-t] [RFC] tests/kms_flip.c: Fix subtests flip-vs-suspend

Some Intel Gen11 systems are not able to do a RTC wake. Instead change the default SUSPEND_TEST_NONE to SUSPEND_TEST_PLATFORM. Signed-off-by: Vidya Srinivas --- tests/kms_flip.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tests/kms_flip.c b/tests/kms_flip.c index

[Intel-gfx] [PATCH i-g-t] [RFC] tests/kms_big_fb: Wait for vblank before collecting CRC

Without wait for vblank, CRC mismatch is seen between big and small CRC on few Gen11 systems. Signed-off-by: Vidya Srinivas --- tests/kms_big_fb.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/tests/kms_big_fb.c b/tests/kms_big_fb.c index b35727a09bd0..f90363c3beb2

[Intel-gfx] [PATCH i-g-t] [RFC] tests/drm_read: Fix subtest invalid-buffer

-off-by: Vidya Srinivas --- tests/drm_read.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tests/drm_read.c b/tests/drm_read.c index ccf9d822fd8d..2fdec5be4078 100644 --- a/tests/drm_read.c +++ b/tests/drm_read.c @@ -103,10 +103,11 @@ static void teardown(int fd) static void

[Intel-gfx] [PATCH i-g-t] [RFC] tests/kms_prime: Aligned pitch to 64 byte for Intel platforms

resolution 1366x768 Signed-off-by: Vidya Srinivas --- tests/kms_prime.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/tests/kms_prime.c b/tests/kms_prime.c index 8cb2ca2a9dc3..fdc941fe8100 100644 --- a/tests/kms_prime.c +++ b/tests/kms_prime.c @@ -51,6 +51,8 @@ static struct

[Intel-gfx] [PATCH i-g-t] [RFC] tests/kms_color: Fix pipe degamma subtests

We need to collect CRC with no degamma transformation and after drawing gradient with degamma LUT. This patch makes subtest pipe degamma code similar to pipe gamma is written. Signed-off-by: Vidya Srinivas --- tests/kms_color.c | 12 ++-- 1 file changed, 2 insertions(+), 10 deletions

[Intel-gfx] [PATCH] drm/i915: Reject 5k on HDR planes for planar fb formats

seen and screen blanks out. Issue is seen on both TGL and ADL platforms. Signed-off-by: Vidya Srinivas Signed-off-by: Yashashvi Shantam --- drivers/gpu/drm/i915/display/skl_scaler.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers

[Intel-gfx] [PATCH] drm/i915: Add PLANE_CUS_CTL restriction in max_width

: Vidya Srinivas Signed-off-by: Yashashvi Shantam Change-Id: If629c478ba044c8bde633de9f0fc638aa6c44233 --- .../gpu/drm/i915/display/intel_display_types.h | 3 ++- .../gpu/drm/i915/display/skl_universal_plane.c | 17 + 2 files changed, 15 insertions(+), 5 deletions(-) diff --git a

[Intel-gfx] [PATCH] drm/i915: Add PLANE_CUS_CTL restriction in max_width

review comments from Ville. Added separate functions for max_width - for HDR and SDR Signed-off-by: Vidya Srinivas Signed-off-by: Yashashvi Shantam --- .../gpu/drm/i915/display/skl_universal_plane.c | 17 +++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/gpu

[Intel-gfx] [PATCH] drm/i915: Add PLANE_CUS_CTL restriction in max_width

review comments from Ville. Added separate functions for max_width - for HDR and SDR Signed-off-by: Vidya Srinivas Signed-off-by: Yashashvi Shantam --- .../gpu/drm/i915/display/skl_universal_plane.c | 17 +++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/gpu

[Intel-gfx] [PATCH] drm/i915: Add PLANE_CUS_CTL restriction in max_width

PLANE_CUS_CTL has a restriction of 4096 width even though PLANE_SIZE and scaler size registers supports max 5120. Take care of this restriction in max_width. Without this patch, when 5k content is sent on HDR plane with NV12 content, FIFO underrun is seen and screen blanks out. v2: Addressed revi

[Intel-gfx] [PATCH] drm/i915: Add PLANE_CUS_CTL restriction in max_width

review comments from Ville. Added separate functions for max_width - for HDR and SDR v3: Addressed review comments from Ville. Changed names of HDR and SDR max_width functions to icl_hdr_plane_max_width and icl_sdr_plane_max_width Reviewed-by: Ville Syrjälä Signed-off-by: Vidya Srinivas Signed-off

[Intel-gfx] [PATCH] drm/i915: Add PLANE_CUS_CTL restriction in max_width

Syrjälä Signed-off-by: Vidya Srinivas Signed-off-by: Yashashvi Shantam --- .../drm/i915/display/skl_universal_plane.c| 21 +++ 1 file changed, 17 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display

[Intel-gfx] [PATCH] drm/i915: Add PLANE_CUS_CTL restriction in max_width

Syrjälä Signed-off-by: Vidya Srinivas --- .../drm/i915/display/skl_universal_plane.c| 21 +++ 1 file changed, 17 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index

[Intel-gfx] [PATCH] drm/i915/dp: DP PHY compliance for JSL

Signed-off-by: Khaled Almahallawy Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/display/intel_dp.c | 40 ++--- 1 file changed, 32 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c

[Intel-gfx] [PATCH 1/3] drm/dp: Add PHY_TEST_PATTERN CP2520 Pattern 2 and 3

From: Khaled Almahallawy Add the missing CP2520 pattern 2 and 3 phy compliance patterns v2: cosemtic changes Reviewed-by: Manasi Navare (v1) Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/drm_dp_helper.c | 2 +- include/drm/drm_dp_helper.h | 4 +++- 2 files changed, 4 insertions(+

[Intel-gfx] [PATCH 3/3] [RFC] drm/i915/dp: DP PHY compliance for EHL/JSL

Khaled's (yet to be merged): https://patchwork.freedesktop.org/series/79779/ Fixed phy patterns for JSL/EHL Add TPS4 support for JSL/EHL Signed-off-by: Khaled Almahallawy Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/display/intel_dp.c

[Intel-gfx] [PATCH 2/3] drm/i915/dp: TPS4 PHY test pattern compliance support

From: Khaled Almahallawy Adding support for TPS4 (CP2520 Pattern 3) PHY pattern source tests. v2: uniform bit names TP4a/b/c (Manasi) Signed-off-by: Khaled Almahallawy Reviewed-by: Manasi Navare Tested-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp.c | 14 -- d

[Intel-gfx] [PATCH] drm/i915/dp: DP PHY compliance for EHL/JSL

v2: Rebased patch on top of: https://patchwork.freedesktop.org/series/79779/ Fixed phy patterns for JSL/EHL Add TPS4 support for JSL/EHL Signed-off-by: Khaled Almahallawy Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/display/intel_dp.c | 81

[Intel-gfx] [PATCH 3/3] [RFC] drm/i915/dp: DP PHY compliance for EHL/JSL

Khaled's (yet to be merged): https://patchwork.freedesktop.org/series/79779/ Fixed phy patterns for JSL/EHL Add TPS4 support for JSL/EHL Signed-off-by: Khaled Almahallawy Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/display/intel_dp.c

[Intel-gfx] [PATCH 1/3] drm/dp: Add PHY_TEST_PATTERN CP2520 Pattern 2 and 3

From: Khaled Almahallawy Add the missing CP2520 pattern 2 and 3 phy compliance patterns v2: cosemtic changes Reviewed-by: Manasi Navare (v1) Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/drm_dp_helper.c | 2 +- include/drm/drm_dp_helper.h | 4 +++- 2 files changed, 4 insertions(+

[Intel-gfx] [PATCH 2/3] drm/i915/dp: TPS4 PHY test pattern compliance support

From: Khaled Almahallawy Adding support for TPS4 (CP2520 Pattern 3) PHY pattern source tests. v2: uniform bit names TP4a/b/c (Manasi) Signed-off-by: Khaled Almahallawy Reviewed-by: Manasi Navare Tested-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp.c | 14 -- d

[Intel-gfx] [PATCH 3/3] [RFC] drm/i915/dp: DP PHY compliance for EHL/JSL

Khaled's (yet to be merged): https://patchwork.freedesktop.org/series/79779/ Fixed phy patterns for JSL/EHL Add TPS4 support for JSL/EHL Signed-off-by: Khaled Almahallawy Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/display/intel_dp.c

[Intel-gfx] [PATCH 2/3] drm/i915/dp: TPS4 PHY test pattern compliance support

From: Khaled Almahallawy Adding support for TPS4 (CP2520 Pattern 3) PHY pattern source tests. v2: uniform bit names TP4a/b/c (Manasi) Signed-off-by: Khaled Almahallawy Reviewed-by: Manasi Navare Tested-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp.c | 14 -- d

[Intel-gfx] [PATCH 1/3] drm/dp: Add PHY_TEST_PATTERN CP2520 Pattern 2 and 3

From: Khaled Almahallawy Add the missing CP2520 pattern 2 and 3 phy compliance patterns v2: cosemtic changes Reviewed-by: Manasi Navare (v1) Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/drm_dp_helper.c | 2 +- include/drm/drm_dp_helper.h | 4 +++- 2 files changed, 4 insertions(+

[Intel-gfx] [PATCH 1/3] drm/dp: Add PHY_TEST_PATTERN CP2520 Pattern 2 and 3

From: Khaled Almahallawy Add the missing CP2520 pattern 2 and 3 phy compliance patterns v2: cosemtic changes Reviewed-by: Manasi Navare (v1) Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/drm_dp_helper.c | 2 +- include/drm/drm_dp_helper.h | 4 +++- 2 files changed, 4 insertions(+

[Intel-gfx] [PATCH 3/3] [RFC] drm/i915/dp: DP PHY compliance for EHL/JSL

Khaled's (yet to be merged): https://patchwork.freedesktop.org/series/79779/ Fixed phy patterns for JSL/EHL Add TPS4 support for JSL/EHL Signed-off-by: Khaled Almahallawy Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/display/intel_dp.c

[Intel-gfx] [PATCH 2/3] drm/i915/dp: TPS4 PHY test pattern compliance support

From: Khaled Almahallawy Adding support for TPS4 (CP2520 Pattern 3) PHY pattern source tests. v2: uniform bit names TP4a/b/c (Manasi) Signed-off-by: Khaled Almahallawy Reviewed-by: Manasi Navare Tested-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp.c | 14 -- d

[Intel-gfx] [PATCH] [RFC] drm/i915/dp: DP PHY compliance for EHL/JSL

Khaled's (yet to be merged): https://patchwork.freedesktop.org/series/79779/ Fixed phy patterns for JSL/EHL Add TPS4 support for JSL/EHL Signed-off-by: Khaled Almahallawy Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/display/intel_dp.c

[Intel-gfx] [PATCH] [RFC] drm/i915/dp: DP PHY compliance for EHL/JSL

Khaled's (yet to be merged): https://patchwork.freedesktop.org/series/79779/ Fixed phy patterns for JSL/EHL Add TPS4 support for JSL/EHL Signed-off-by: Khaled Almahallawy Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/display/intel_dp.c

[Intel-gfx] [PATCH i-g-t 1/6] i-g-t: kms_plane_scaling: Fix basic scaling test

eries will cover corner cases of scaling. Signed-off-by: Mahesh Kumar Signed-off-by: Jyoti Yadav Signed-off-by: Vidya Srinivas --- tests/kms_plane_scaling.c | 234 +- 1 file changed, 125 insertions(+), 109 deletions(-) diff --git a/tests/kms_plane_s

[Intel-gfx] [PATCH i-g-t 0/6] kms_plane_scaling fixes and enhancement

This series fixes the current scaler igt test failures and enhances kms_plane_scaling and kms_plane for covering subtests below: - verify all the supported pixel formats in planes - combination of rotation and scaling - combination of tiling and scaling - multi-plane/multi-pipe scaling It also enha

[Intel-gfx] [PATCH i-g-t 3/6] i-g-t: lib/igt_kms: Run kms_plane for all supported pixel formats

Signed-off-by: Vidya Srinivas --- tests/kms_plane.c | 123 ++ 1 file changed, 123 insertions(+) diff --git a/tests/kms_plane.c b/tests/kms_plane.c index 92bf67f..5f25177 100644 --- a/tests/kms_plane.c +++ b/tests/kms_plane.c @@ -368,6 +368,125

[Intel-gfx] [PATCH i-g-t 6/6] i-g-t: kms_plane_scaling: test for multi pipe with scaling

From: Jyoti Yadav Patch adds subtest to display primary and overlay planes on two connected pipes and runs scaling test on both pipes Signed-off-by: Jyoti Yadav Signed-off-by: Mahesh Kumar Signed-off-by: Vidya Srinivas --- tests/kms_plane_scaling.c | 114

[Intel-gfx] [PATCH i-g-t 4/6] i-g-t kms_plane_scaling: test scaling with tiling rotation and pixel formats

From: Jyoti Yadav This patch adds subtest for testing scaling in combination with rotation and pixel formats. Signed-off-by: Jyoti Yadav Signed-off-by: Mahesh Kumar Signed-off-by: Vidya Srinivas --- tests/kms_plane_scaling.c | 203 -- 1 file

[Intel-gfx] [PATCH i-g-t 5/6] i-g-t: kms_plane_scaling: test scaler with clipping clamping

From: Jyoti Yadav This patch adds subtest to test scaler clipping and clamping scenario Signed-off-by: Jyoti Yadav Signed-off-by: Mahesh Kumar Signed-off-by: Vidya Srinivas --- tests/kms_plane_scaling.c | 69 +++ 1 file changed, 69 insertions

[Intel-gfx] [PATCH i-g-t 2/6] i-g-t: lib: Add plane pixel format support

Yadav Signed-off-by: Vidya Srinivas --- lib/igt_fb.c | 16 lib/igt_kms.c | 29 + lib/igt_kms.h | 7 +++ 3 files changed, 52 insertions(+) diff --git a/lib/igt_fb.c b/lib/igt_fb.c index d4eaed7..21d666d 100644 --- a/lib/igt_fb.c +++ b/lib

[Intel-gfx] [PATCH 04/15] drm/i915/skl+: support varification of DDB HW state for NV12

From: Mahesh Kumar NV12 formats have two registers for DDB. verify both the registers for NV12 during verify_wm_state. Signed-off-by: Mahesh Kumar --- drivers/gpu/drm/i915/intel_display.c | 2 +- drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 50 ++

[Intel-gfx] [PATCH 02/15] drm/i915/skl+: refactore WM calculation for NV12

From: Mahesh Kumar Current code calculates DDB for planar formats in such a way that we store DDB of plane-0 in plane 1 & vice-versa. In order to make this clean this patch refactors WM/DDB calculation for NV12 planar formats. Signed-off-by: Mahesh Kumar --- drivers/gpu/drm/i915/i915_drv.h |

[Intel-gfx] [PATCH 01/15] drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values

From: Mahesh Kumar skl_wm_values struct contains values os pipe/plane DDB only. so rename it for better readability of code. s/skl_wm_values/skl_ddb_values Signed-off-by: Mahesh Kumar --- drivers/gpu/drm/i915/i915_drv.h | 4 ++-- drivers/gpu/drm/i915/intel_drv.h | 2 +- drivers/gpu/drm/i91

[Intel-gfx] [PATCH 05/15] drm/i915/skl+: NV12 related changes for WM

From: Mahesh Kumar NV12 require WM calculation for UV plane as well. UV plane WM should also fulfill all the WM related restrictions. Signed-off-by: Mahesh Kumar --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 54

[Intel-gfx] [PATCH 08/15] drm/i915/skl+: nv12 workaround disable WM level 1-7

From: Mahesh Kumar Display Workaround #0826 (SKL:ALL BXT:ALL) & #1059(CNL:A) Hardware sometimes fails to wake memory from pkg C states fetching the last few lines of planar YUV 420 (NV12) planes. This causes intermittent underflow and corruption. WA: Disable package C states or do not enable late

[Intel-gfx] [PATCH 07/15] drm/i915/skl+: make sure higher latency level has higher wm value

From: Mahesh Kumar DDB allocation optimization algorithm require/assumes ddb allocation for any memory C-state level DDB value to be as high as level below. Render decompression require level WM to be as high as wm level-0. This patch fulfils both the requirements. Signed-off-by: Mahesh Kumar -

[Intel-gfx] [PATCH 03/15] drm/i915/skl+: add NV12 in skl_format_to_fourcc

From: Mahesh Kumar Add support of recognizing DRM_FORMAT_NV12 from plane_format register value. Signed-off-by: Mahesh Kumar --- drivers/gpu/drm/i915/intel_display.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.

[Intel-gfx] [PATCH 09/15] drm/i915/skl: split skl_compute_ddb function

From: Mahesh Kumar This patch split skl_compute_wm/ddb functions into two parts. One adds all affected pipes after the commit to atomic_state structure and second part does compute the DDB. Signed-off-by: Mahesh Kumar --- drivers/gpu/drm/i915/intel_pm.c | 158 ++

[Intel-gfx] [PATCH 10/15] drm/i915: Set scaler mode for NV12

Reviewed-by: Clinton Taylor Signed-off-by: Chandra Konduru Signed-off-by: Nabendu Maiti Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_atomic.c | 8 +++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm

[Intel-gfx] [PATCH 06/15] drm/i915/skl+: pass skl_wm_level struct to wm compute func

From: Mahesh Kumar This will reduce number of arguments required to be pass in skl_compute_plane_wm function. Signed-off-by: Mahesh Kumar --- drivers/gpu/drm/i915/intel_pm.c | 18 +++--- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c

[Intel-gfx] [PATCH 00/15] Adding NV12 support

This patch series is adding NV12 support for Broxton display after rebasing on latest drm-tip. Initial series of the patches can be found here: https://lists.freedesktop.org/archives/intel-gfx/2015-May/066786.html Previous revision history: The first version of patches were reviewed when floated b

[Intel-gfx] [PATCH 12/15] drm/i915: Upscale scaler max scale for NV12

: Rebased (me) Tested-by: Clinton Taylor Reviewed-by: Clinton Taylor Signed-off-by: Chandra Konduru Signed-off-by: Nabendu Maiti Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/intel_display.c | 33 +++-- drivers/gpu/drm/i915/intel_drv.h | 3 ++- drivers

[Intel-gfx] [PATCH 14/15] drm/i915: Add NV12 as supported format for sprite plane

sed (me) Restricting NV12 changes to BXT and KBL Restricting NV12 changes for plane 0 (overlay) v9: Rebased (me) Tested-by: Clinton Taylor Reviewed-by: Clinton Taylor Signed-off-by: Chandra Konduru Signed-off-by: Nabendu Maiti Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH 15/15] drm/i915: Add NV12 support to intel_framebuffer_init

aylor Reviewed-by: Clinton Taylor Signed-off-by: Chandra Konduru Signed-off-by: Nabendu Maiti Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/intel_display.c | 8 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_disp

[Intel-gfx] [PATCH 11/15] drm/i915: Update format_is_yuv() to include NV12

eviewed-by: Clinton Taylor Signed-off-by: Chandra Konduru Signed-off-by: Nabendu Maiti Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/intel_sprite.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/inte

[Intel-gfx] [PATCH 13/15] drm/i915: Add NV12 as supported format for primary plane

: Rebased (me) Tested-by: Clinton Taylor Reviewed-by: Clinton Taylor Signed-off-by: Chandra Konduru Signed-off-by: Nabendu Maiti Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/intel_display.c | 26 -- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a

[Intel-gfx] [PATCH v2 2/6] drm/i915: Add NV12 as supported format for primary plane

endu Maiti Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/intel_display.c | 55 ++-- drivers/gpu/drm/i915/intel_drv.h | 2 ++ 2 files changed, 55 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gp

[Intel-gfx] [PATCH v2 1/6] drm/i915: Enable display workaround 827 for all planes, v2.

From: Maarten Lankhorst The workaround was applied only to the primary plane, but is required on all planes. Iterate over all planes in the crtc atomic check to see if the workaround is enabled, and only perform the actual toggling in the pre/post plane update functions. Changes since v1: - Trac

[Intel-gfx] [PATCH v2 3/6] drm/i915: Add NV12 as supported format for sprite plane

to Megha Aggarwal Credits-to: Megha Aggarwal Credits-to: Kristian Høgsberg Tested-by: Clinton Taylor Reviewed-by: Juha-Pekka Heikkila Reviewed-by: Shashank Sharma Reviewed-by: Clinton Taylor Signed-off-by: Chandra Konduru Signed-off-by: Nabendu Maiti Signed-off-by: Vidya Srinivas --- drive

[Intel-gfx] [PATCH v2 5/6] drm/i915: Enable Display WA 0528

Lankhorst Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/intel_display.c | 20 ++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f64bef9..bc83f10 100644 --- a/drivers/gpu/drm

[Intel-gfx] [PATCH v2 0/6] Enable NV12 support

for sprite plane drm/i915: Add NV12 support to intel_framebuffer_init Maarten Lankhorst (1): drm/i915: Enable display workaround 827 for all planes, v2. Vidya Srinivas (2): drm/i915: Enable Display WA 0528 drm/i915: Do not do fb src adjustments for NV12 drivers/gpu/drm/i915

[Intel-gfx] [PATCH v2 6/6] drm/i915: Do not do fb src adjustments for NV12

We skip src trunction/adjustments for NV12 case and handle the sizes directly. Without this, pipe fifo underruns are seen on APL/KBL. v2: For NV12, making the src coordinates multiplier of 4 Credits-to: Maarten Lankhorst Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/intel_display.c

[Intel-gfx] [PATCH v2 4/6] drm/i915: Add NV12 support to intel_framebuffer_init

Reviewed-by: Clinton Taylor Reviewed-by: Juha-Pekka Heikkila Signed-off-by: Chandra Konduru Signed-off-by: Nabendu Maiti Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/intel_display.c | 16 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_disp

[Intel-gfx] [PATCH v4 4/6] drm/i915: Add NV12 support to intel_framebuffer_init

or fb creation of NV12 Credits-to: Maarten Lankhorst Tested-by: Clinton Taylor Reviewed-by: Maarten Lankhorst Reviewed-by: Shashank Sharma Reviewed-by: Clinton Taylor Reviewed-by: Juha-Pekka Heikkila Signed-off-by: Chandra Konduru Signed-off-by: Nabendu Maiti Signed-off-by: Vidya S

[Intel-gfx] [PATCH v4 5/6] drm/i915: Enable Display WA 0528

Credits-to: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/intel_display.c | 20 ++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915

[Intel-gfx] [PATCH v4 3/6] drm/i915: Add NV12 as supported format for sprite plane

Signed-off-by: Chandra Konduru Signed-off-by: Nabendu Maiti Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/intel_sprite.c | 29 +++-- 1 file changed, 27 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_s

[Intel-gfx] [PATCH v4 0/6] Enable NV12 support

Vidya Srinivas (1): drm/i915: Enable Display WA 0528 drivers/gpu/drm/i915/intel_atomic_plane.c | 7 +- drivers/gpu/drm/i915/intel_display.c | 169 ++ drivers/gpu/drm/i915/intel_drv.h | 3 + drivers/gpu/drm/i915/intel_sprite.c | 44 ++-- 4

[Intel-gfx] [PATCH v4 6/6] drm/i915: Add skl_check_nv12_surface for NV12

Signed-off-by: Maarten Lankhorst Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/intel_display.c | 39 drivers/gpu/drm/i915/intel_sprite.c | 15 ++ 2 files changed, 50 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH v4 2/6] drm/i915: Add NV12 as supported format for primary plane

eviewed-by: Clinton Taylor Reviewed-by: Shashank Sharma Signed-off-by: Chandra Konduru Signed-off-by: Nabendu Maiti Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/intel_display.c | 55 ++-- drivers/gpu/drm/i915/intel_drv.h | 2 ++ 2 files changed, 55

[Intel-gfx] [PATCH v4 1/6] drm/i915: Enable display workaround 827 for all planes, v2.

From: Maarten Lankhorst The workaround was applied only to the primary plane, but is required on all planes. Iterate over all planes in the crtc atomic check to see if the workaround is enabled, and only perform the actual toggling in the pre/post plane update functions. Changes since v1: - Trac

[Intel-gfx] [PATCH v5 0/6] Enable NV12 support

supported format for primary plane drm/i915: Add NV12 as supported format for sprite plane drm/i915: Add NV12 support to intel_framebuffer_init Maarten Lankhorst (2): drm/i915: Enable display workaround 827 for all planes, v2. drm/i915: Add skl_check_nv12_surface for NV12 Vidya Srinivas (1

[Intel-gfx] [PATCH v5 2/6] drm/i915: Add NV12 as supported format for primary plane

y: Clinton Taylor Reviewed-by: Kristian Høgsberg Reviewed-by: Maarten Lankhorst Reviewed-by: Juha-Pekka Heikkila Reviewed-by: Clinton Taylor Reviewed-by: Shashank Sharma Signed-off-by: Chandra Konduru Signed-off-by: Nabendu Maiti Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/intel

[Intel-gfx] [PATCH v5 1/6] drm/i915: Enable display workaround 827 for all planes, v2.

: - Track active NV12 planes in a nv12_planes bitmask. (Ville) v2: Removing BROXTON support for NV12 due to WA826 Signed-off-by: Maarten Lankhorst Cc: Ville Syrjälä Reviewed-by: Ville Syrjälä Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/intel_atomic_plane.c | 7 - drivers/gpu/drm/i915

[Intel-gfx] [PATCH v5 3/6] drm/i915: Add NV12 as supported format for sprite plane

Signed-off-by: Chandra Konduru Signed-off-by: Nabendu Maiti Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/intel_sprite.c | 29 +++-- 1 file changed, 27 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_s

[Intel-gfx] [PATCH v5 5/6] drm/i915: Enable Display WA 0528

v4: Removed support for NV12 for BROXTON Credits-to: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/intel_display.c | 22 +++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH v5 6/6] drm/i915: Add skl_check_nv12_surface for NV12

v4: Added RB from Mika Reviewed-by: Mika Kahola Signed-off-by: Maarten Lankhorst Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/intel_display.c | 39 drivers/gpu/drm/i915/intel_sprite.c | 15 ++ 2 files changed, 50 insertions(+), 4

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