define DP_NAK_LINK_FAILURE 0x06
+#define DP_NAK_NO_RESOURCES 0x07
+#define DP_NAK_DPCD_FAIL 0x08
+#define DP_NAK_I2C_NAK 0x09
+#define DP_NAK_ALLOCATE_FAIL 0x0a
+
#define MODE_I2C_START 1
#define MODE_I2C_WRITE 2
#define MODE_I2C_READ 4
Constant definitions look good.
Reviewed-by: Todd Previte
Dave
include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -181,6 +181,7 @@ struct drm_mode_get_plane_res {
#define DRM_MODE_ENCODER_TVDAC 4
#define DRM_MODE_ENCODER_VIRTUAL 5
#define DRM_MODE_ENCODER_DSI 6
+#define DRM_MODE_ENCODER_DPMST 7
struct drm_mode_get_encoder {
__u32 encoder_
ruct drm_mode_group *group);
+extern void drm_reinit_primary_mode_group(struct drm_device *dev);
extern bool drm_probe_ddc(struct i2c_adapter *adapter);
extern struct edid *drm_get_edid(struct drm_connector *connector,
struct i2c_adapter *adapter);
Reviewed-by: Todd Previte
Dave Airlie <mailto:ai
ffer Control */
#define DDI_BUF_CTL_A 0x64000
Definitions look correct. If I noticed any discrepancies during testing,
I'll flag it.
Reviewed-by: Todd Previte
Dave Airlie <mailto:airl...@gmail.com>
Tuesday, May 20, 2014 7:54 PM
Hey,
So this set is pretty close to what I think we should be
Adds a function to set the training pattern for Displayport. This is
functionality required to establish more fine-grained control over
the Displayport interface, both for operational reliability and
compliance testing.
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/i915_reg.h | 2
.
Todd Previte (5):
dmr/i915: Displayport - Add a function to set the training pattern
drm/i915: Displayport - Add function to check link status
drm/i915: Displayport - Add function to enable/disable scrambling on
the main link
drm/i915: Displayport - Add function for executing a single
Adds a function to check the link status across all lanes for Displayport.
This is functionality required to establish more fine-grained control over
the Displayport interface, both for operational reliability and
compliance testing.
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915
Adds a function to execute a single iteration of the clock recovery
sequence for Displayport. This is functionality required to establish
more fine-grained control over the Displayport interface, both for
operational reliability and compliance testing.
Signed-off-by: Todd Previte
---
drivers
Adds a function to enable and disable scrambling directly for the main link.
This is functionality required to establish more fine-grained control over
the Displayport interface, both for operational reliability and
compliance testing.
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915
Adds a function to execute a single iteration of the channel equalization
sequence for Displayport. This is functionality required to establish more
fine-grained control over the Displayport interface, both for operational
reliability and compliance testing.
Signed-off-by: Todd Previte
For HSW+ platforms, enable the 5.4Ghz (HBR2) link rate for devices that support
it. The
sink device must report that is supports Displayport 1.2 and the HBR2 bit rate
in the
DPCD in order to use HBR2.
---
drivers/gpu/drm/i915/intel_dp.c | 21 +++--
1 file changed, 15 insertions(+
On 1/16/2014 11:30 PM, Daniel Vetter wrote:
On Fri, Jan 17, 2014 at 4:06 AM, Todd Previte wrote:
For HSW+ platforms, enable the 5.4Ghz (HBR2) link rate for devices that support
it. The
sink device must report that is supports Displayport 1.2 and the HBR2 bit rate
in the
DPCD in order to use
On 1/17/2014 4:55 AM, Damien Lespiau wrote:
On Thu, Jan 16, 2014 at 08:06:08PM -0700, Todd Previte wrote:
For HSW+ platforms, enable the 5.4Ghz (HBR2) link rate for devices that support
it. The
sink device must report that is supports Displayport 1.2 and the HBR2 bit rate
in the
DPCD in order
On 1/17/2014 8:08 AM, Damien Lespiau wrote:
On Fri, Jan 17, 2014 at 07:58:58AM -0700, Todd Previte wrote:
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 7df5085..f92d1c0 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
On 1/17/2014 6:32 AM, Jani Nikula wrote:
On Fri, 17 Jan 2014, Damien Lespiau wrote:
I see spaces instead of tabs. You can use the useful checkpatch.pl
script on patches to catch those pesky style issues (from within a linux
tree):
$ ./scripts/checkpatch.pl
0001-drm-i915-Enable-5.4Ghz-HBR2-lin
Clean up and adjustments per the feedback above.
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appropriate hardware to 5.4Ghz link rate configuration
- Added a check for TPS3 supprt in the DPCD read
- Adjusted channel equalization to use TPS3 when appropriate
- Cleaned up whitespace
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/intel_dp.c | 30
More whitepsace cleanup.
One caveat with this patch: current link policy dictates that the driver will
train the
"wide and slow", i.e. max lanes at low speed. It will increase lanes and speed
when the
specified resolution demands greater bandwidth. Consequently, the resolution
w
For HSW+ platforms, enable the 5.4Ghz (HBR2) link rate for devices that support
it. The
sink device must report that is supports Displayport 1.2 and the HBR2 bit rate
in the
DPCD in order to use HBR2.
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/intel_dp.c | 31
These bits are in reverse order in the header from those defined in
the specification. Change the bit positions for ports B and D to
correctly match the spec.
---
drivers/gpu/drm/i915/i915_reg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h
These bits are in reverse order in the header from those defined in
the specification. Change the bit positions for ports B and D to
correctly match the spec.
- Added sign-off
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/i915_reg.h | 4 ++--
1 file changed, 2 insertions(+), 2
On 11/22/13 1:36 AM, Takashi Iwai wrote:
I got kernel WARNINGs frequently on Haswell laptops complaining about
invalid max DP link bw. With drm.debug=0x0e, it turned out that the
obtained DPCD is utterly bogus when it happens:
[drm:intel_dp_get_dpcd], DPCD: 4d 4d 4d 4d 4d 4d 4d 4d 4d 4d 4d 4d
Addresses the comments and feedback herein. VLV2 and gen4 have separate bit
definitions now. The correct bits are selected in gen4x_dp_detect() based on
the detected platform.
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ff-by: Todd Previte
---
drivers/gpu/drm/i915/i915_reg.h | 11 ---
drivers/gpu/drm/i915/intel_dp.c | 39 +++
2 files changed, 35 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2d77b51..0e
Fixed the trailing brace for the switch() statement in gen4x_dp_detect()
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lost trailing brace for the added switch()
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/i915_reg.h | 11 ---
drivers/gpu/drm/i915/intel_dp.c | 40
2 files changed, 36 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_re
On 01/22/2014 11:41 PM, Jani Nikula wrote:
On Thu, 23 Jan 2014, Todd Previte wrote:
Add new definitions for hotplug live status bits for VLV2 since they're
in reverse order from the gen4x ones.
Changelog:
- Restored gen4 bit definitions
- Added new definitions for VLV2
- Added platform
On 09/20/2013 06:42 AM, Jani Nikula wrote:
Per DP1.2 spec.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dp.c |7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 9770160..6626514 1006
On 09/20/2013 06:42 AM, Jani Nikula wrote:
Reduce AUX transactions for non-eDP.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dp.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
ep_range(500, 600);
+ else
+ usleep_range(300, 400);
continue;
default:
DRM_ERROR("aux_ch invalid native reply 0x%02x\n",
Those look like reasonable values to me.
[Reviewed-by]:
On 09/20/2013 01:57 PM, Paulo Zanoni wrote:
2013/9/20 Todd Previte :
On 09/20/2013 06:42 AM, Jani Nikula wrote:
Reduce AUX transactions for non-eDP.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dp.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff
Looks good.
Reviewed-by: Todd Previte
On Fri, Sep 27, 2013 at 4:48 AM, Jani Nikula wrote:
> Detailed cap info at address 80h is not available with DPCD ver
> 1.0. Whether such devices exist in the wild I don't know, but there
> should be no harm done in having the defines
Yep. Good to go.
Reviewed-by: Todd Previte
On Fri, Sep 27, 2013 at 4:51 AM, Jani Nikula wrote:
> On Fri, 20 Sep 2013, Todd Previte wrote:
> > On 09/20/2013 06:42 AM, Jani Nikula wrote:
> >> Per DP1.2 spec.
> >>
> >> Signed-off-by: Jani Nikula
> >&g
).
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/intel_dp.c | 108 +++-
include/drm/drm_dp_helper.h | 3 +-
2 files changed, 108 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index
On 10/4/13 3:45 AM, Chris Wilson wrote:
On Fri, Oct 04, 2013 at 03:32:10AM -0700, Todd Previte wrote:
This initial patch adds support for automated testing of the source device
to the i915 driver. Most of this patch is infrastructure for the tests;
follow up patches will add support for the
On 10/4/13 4:49 AM, Jani Nikula wrote:
On Fri, 04 Oct 2013, Todd Previte wrote:
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index ae8dbfb..9fa544b 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -266,9 +266,10 @@
#define
).
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/intel_dp.c | 75 +++--
1 file changed, 72 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 9770160..1f97a1c 100644
--- a/drivers/gpu/drm
Ignore this message. Will resend to appropriate thread.
-T
On 10/4/13 12:46 PM, Todd Previte wrote:
This initial patch adds support for automated testing of the source device
to the i915 driver. Most of this patch is infrastructure for the tests;
follow up patches will add support for the
).
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/intel_dp.c | 75 +++--
1 file changed, 72 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 9770160..1f97a1c 100644
--- a/drivers/gpu/drm
- DP_TEST_LINK_PATTERN is ambiguous, rename to DP_TEST_LINK_VIDEO_PATTERN to
clarify
- Added DP_TEST_LINK_FAUX_PATTERN to support automated testing of Fast AUX
Signed-off-by: Todd Previte
---
include/drm/drm_dp_helper.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a
On 10/4/13 1:39 PM, Ben Widawsky wrote:
On Fri, Oct 04, 2013 at 11:11:32AM -0700, Todd Previte wrote:
On 10/4/13 3:45 AM, Chris Wilson wrote:
On Fri, Oct 04, 2013 at 03:32:10AM -0700, Todd Previte wrote:
This initial patch adds support for automated testing of the source device
to the i915
bugs.freedesktop.org/6549://bugs.freedesktop.org/show_bug.cgi?id=65496
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=59321
Tested-by: Takashi Iwai
Tested-by: Paulo Zanoni
Signed-off-by: Ben Widawsky
Tested-By: Todd Previte
---
drivers/gpu/drm/i915/i915_drv.c | 5 ++-
drivers/gpu/drm
Revised patch incorporating feedback from the various reviews.
- Changed printk() to DRM_DEBUG_KMS()
- Removed extraneous comments
- Added test hook for Fast AUX automated testing
Note this patch relies on the constants defined in drm/drm_dp_helper.h that
were updated
in a separa
).
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/intel_dp.c | 87 +++--
1 file changed, 84 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index c8515bb..5f2a720 100644
--- a/drivers/gpu/drm
On 11/5/13 2:21 AM, Jani Nikula wrote:
On Sat, 02 Nov 2013, Todd Previte wrote:
This initial patch adds support for automated testing of the source device
to the i915 driver. Most of this patch is infrastructure for the tests;
follow up patches will add support for the individual tests with
he real mV and dB used by the HW.
I'm in agreement Paulo's assessment above. Eventually we want to
standardize on the concept of the driver using "levels" not values for
voltage swing and preemphasis. This solution works for BDW in the near
term, though, so I'm goo
);
ironlake_edp_backlight_off(intel_dp);
- intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
+ intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
ironlake_edp_panel_off(intel_dp);
/* cpu edp my only be disable _after_ the cpu pipe/plane is disabled. */
Reviewed-by: Todd Previte
regarding SST mode operation
- Removed an erroneous line of code that snuck in during rebasing
V4:
- Added a disable of the main stream (DP transport) for the long pulse case
for SST to support compliance testing
Signed-off-by: Todd PRevite
---
drivers/gpu/drm/i915/intel_dp.c | 25
On 3/9/2015 10:57 AM, Jani Nikula wrote:
On Thu, 19 Feb 2015, Todd Previte wrote:
This patch is the amalgamation of 7 patches from the V2 series. These
patches all involve the implementation of the debugfs mechanism for
handling Displayport compliance testing. The following are the commit
_CNT_SHIFT);
vlv_dpio_write(dev_priv, pipe, CHV_PLL_DW8(port), dpio_val);
Looks good to me.
Reviewed-by: Todd Previte
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t_connector(struct intel_digital_port
*intel_dig_port,
I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
}
+ i915_debugfs_connector_add(connector);
+
return true;
}
Looks good. I'm going to apply this patch and check it out.
Reviewed-by: Todd Previte
_
might make it easier to understand
which platforms support which rates at a glance. Certainly not a
blocking request, just a thought.
Otherwise this looks fine.
Reviewed-by: Todd Previte
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aux;
uint8_t train_set[4];
int panel_power_up_delay;
The code looks good from here. Only thing to double check is where
intel_read_sink_rates() is called and make sure it's now expecting 0 as
a success case.
Reviewed-by: Todd Previte
__
source_len = intel_dp_source_rates(intel_dp, &source_rates);
supported_len = intel_supported_rates(source_rates, source_len,
sink_rates, sink_len, supported_rates);
Looks like it's good to go.
Reviewed-by: Todd Previte
_
neous comment
- Added responses to review feedback into the patch notes
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/intel_dp.c | 31 ++-
1 file changed, 18 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915
The debug message is missing a newline at the end and it makes the
logs hard to read when a device defers a lot. Simple 2-character fix
adds the newline at the end.
Signed-off-by: Todd Previte
Cc: dri-de...@lists.freedesktop.org
---
drivers/gpu/drm/drm_dp_helper.c | 2 +-
1 file changed, 1
DID functions
- Updated to use the raw header corruption detection mechanism
- Moved the declaration of the test_data variable here
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/intel_dp.c | 53
drivers/gpu/drm/i915/intel_drv.h | 3 ++-
2 files chan
is required to poll on the test_active file
in order to determine when it needs to begin its operations.
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/i915_debugfs.c | 208
1 file changed, 208 insertions(+)
diff --git a/drivers/gpu/drm/i915
.
V2:
- Changed udelay() to usleep_range()
V3:
- Removed extraneous check for timeout
- Updated comment to reflect this change
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/intel_dp.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915
, however, as a worse case real-world
scenario, it would result in 13 attempts ( 6 native defers, 7 I2C defers)
for a single transaction to complete. The net result is a slightly slower
response to an EDID read that shouldn't significantly impact overall
performance.
Signed-off-by: Todd Previt
the sink
- Removed FAUX test case since it's deprecated now
- Removed the compliance flag assignment in handle_test_request
V4:
- Moved declaration of type_type here
- Removed declaration of test_data (moved to a later patch)
- Added reset to 0 for compliance test variables
Signed-off-
This is the 4th iteration of the Displayport compliance testing patch set for
performing compliance testing operations of the i915 driver. High level changes
are listed below, with the specifics for each patch listed in the commit
messages.
Kernel:
Changes for V4:
- Removed the code for link c
regarding SST mode operation
- Removed an erroneous line of code that snuck in during rebasing
V4:
- Added a disable of the main stream (DP transport) for the long pulse case
for SST to support compliance testing
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/intel_dp.c | 10 --
1
ce testing code to acknowledge that fact and react
appropriately. The
flag is automatically cleared on read.
This code is designed to expressly work for compliance testing without
disrupting normal
operations for EDID reading and parsing.
Signed-off-by: Todd Previte
Cc: dri-de...@lists.freed
regarding SST mode operation
- Removed an erroneous line of code that snuck in during rebasing
V4:
- Added a disable of the main stream (DP transport) for the long pulse case
for SST to support compliance testing
V5:
- Reworked SST handling to support tests 4.2.2.7 and 4.2.2.8
Signed-off-by: Todd
here for compatibility for pre-HDCP 1.3 devices.
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/intel_dp.c | 14 +-
drivers/gpu/drm/i915/intel_drv.h | 4
2 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915
Improve Displayport compliance support. These patches add support for
the following tests in the Displayport Link CTS Core 1.2 rev1.1:
4.2.2.7: Branch Device Detection upon HPD Plug Event
4.2.2.8: EDID read on IRQ_HPD event after Branch Device detection
The patches require the initial Display
sink device to indicate a status change in
the downstream ports to which the source device must respond by
reading the EDID from the attached sink.
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/intel_dp.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915
response
time for the user app, as it is required to poll on the test_active file
in order to determine when it needs to begin its operations.
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/i915_debugfs.c | 208
1 file changed, 208 insertions(+)
diff --git a
On 4/1/2015 11:23 AM, Ville Syrjälä wrote:
On Tue, Mar 31, 2015 at 10:15:00AM -0700, Todd Previte wrote:
The Displayport Link Layer Compliance Testing Specification 1.2 rev 1.1
specifies that repeated AUX transactions after a failure (no response /
invalid response) must have a minimum delay
On 4/1/2015 12:22 PM, Ville Syrjälä wrote:
On Wed, Apr 01, 2015 at 11:55:44AM -0700, Todd Previte wrote:
On 4/1/2015 11:23 AM, Ville Syrjälä wrote:
On Tue, Mar 31, 2015 at 10:15:00AM -0700, Todd Previte wrote:
The Displayport Link Layer Compliance Testing Specification 1.2 rev 1.1
extraneous check for timeout
- Updated comment to reflect this change
V4:
- Reformatted a comment
V5:
- Added separate check for HW timeout on AUX transactions. A message
is logged upon detection of this case.
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/intel_dp.c | 14
On 4/6/15 5:05 PM, Paulo Zanoni wrote:
2015-03-31 14:15 GMT-03:00 Todd Previte :
For test 4.2.2.5 to pass per the Link CTS Core 1.2 rev1.1 spec, the source
device must attempt at least 7 times to read the EDID when it receives an
I2C defer. The normal DRM code makes only 7 retries, regardless
On 4/6/15 4:28 PM, Paulo Zanoni wrote:
2015-04-01 16:45 GMT-03:00 Todd Previte :
On 4/1/2015 12:22 PM, Ville Syrjälä wrote:
On Wed, Apr 01, 2015 at 11:55:44AM -0700, Todd Previte wrote:
On 4/1/2015 11:23 AM, Ville Syrjälä wrote:
On Tue, Mar 31, 2015 at 10:15:00AM -0700, Todd Previte
indicating a timeout has been
detected (review feedback)
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/intel_dp.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index ed2f60c..8b59458 100644
umber of I2C Defers to limit the number
of times that the retries variable will be decremented. This
is to address review feedback regarding possible infinite loops
from misbehaving sink devices.
Signed-off-by: Todd Previte
Cc: dri-de...@lists.freedesktop.org
---
drivers/gpu/drm/drm_dp_hel
On 4/6/15 5:10 PM, Paulo Zanoni wrote:
2015-03-31 14:14 GMT-03:00 Todd Previte :
Add the skeleton framework for supporting automation for Displayport compliance
testing. This patch adds the necessary framework for the source device to
appropriately respond to test automation requests from a
On 4/7/15 7:29 AM, Paulo Zanoni wrote:
2015-04-06 23:11 GMT-03:00 Todd Previte :
For test 4.2.2.5 to pass per the Link CTS Core 1.2 rev1.1 spec, the source
device must attempt at least 7 times to read the EDID when it receives an
I2C defer. The normal DRM code makes only 7 retries, regardless
On 4/6/15 5:10 PM, Paulo Zanoni wrote:
2015-03-31 14:14 GMT-03:00 Todd Previte :
Add the skeleton framework for supporting automation for Displayport compliance
testing. This patch adds the necessary framework for the source device to
appropriately respond to test automation requests from a
Fixed the commit message. That will be in V5 of the patch set to be
posted today.
On 4/7/2015 6:57 AM, Paulo Zanoni wrote:
2015-04-06 23:09 GMT-03:00 Todd Previte :
The Displayport Link Layer Compliance Testing Specification 1.2 rev 1.1
specifies that repeated AUX transactions after a failure
On 4/8/2015 11:53 AM, Paulo Zanoni wrote:
2015-04-01 15:00 GMT-03:00 Todd Previte :
Update the hot plug function to handle the SST case. Instead of placing
the SST case within the long/short pulse block, it is now handled after
determining that MST mode is not in use. This way, the topology
On 4/8/2015 9:51 AM, Paulo Zanoni wrote:
2015-03-31 14:15 GMT-03:00 Todd Previte :
Displayport compliance test 4.2.2.6 requires that a source device be capable of
detecting
a corrupt EDID. To do this, the test sets up an invalid EDID header to be read
by the source
device. Unfortunately
On 4/8/2015 10:02 AM, Paulo Zanoni wrote:
2015-03-31 14:15 GMT-03:00 Todd Previte :
Updates the EDID compliance test function to perform the EDID read as
required by the tests. This read needs to take place in the kernel for
reasons of speed and efficiency. The results of the EDID read
support for these tests is implemented in later patches in this series.
V2:
- Fixed compilation error introduced during rework
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/intel_dp.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers
variable
is actually declared
Signed-off-by: Todd Previte
Cc: dri-de...@lists.freedesktop.org
---
drivers/gpu/drm/drm_edid.c| 31 ++-
drivers/gpu/drm/drm_edid_load.c | 7 +--
drivers/gpu/drm/i2c/tda998x_drv.c | 4 ++--
drivers/gpu/drm/i915/intel_dp.c
On 4/13/15 7:10 AM, Paulo Zanoni wrote:
2015-04-10 13:12 GMT-03:00 Todd Previte :
Adds in an EDID read after the DPCD read to accommodate test 4.2.2.1 in the
Displayport Link CTS Core 1.2 rev1.1. This test requires an EDID read for
all HPD plug events. To reduce the amount of code, this EDID
On 10/16/2014 10:46 AM, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä
Turning vdd on/off can generate a long hpd pulse on eDP ports. In order
to handle hpd we would need to turn on vdd to perform aux transfers.
This would lead to an endless cycle of
"vdd off -> long hpd -> vdd on ->
On 10/28/2014 1:15 AM, Daniel Vetter wrote:
On Wed, Oct 22, 2014 at 08:10:40AM -0700, Todd Previte wrote:
On 10/16/2014 11:27 AM, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä
There's no point in checking if the data lanes came out of reset after
link training. If the data
1/2014 10:10 AM, Paulo Zanoni wrote:
2014-10-09 12:38 GMT-03:00 Todd Previte :
These counters are used for Displayort complinace testing to detect error
conditions
when executing certain compliance tests. Currently these are used in the EDID
tests
to determine if the video mode needs to be se
review feedback
- Updated commit message
- Changed from uint8_t to uint32_t
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Todd Previte
---
drivers/gpu/drm/drm_dp_helper.c | 2 ++
include/drm/drm_dp_helper.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm
(struct members declared in a later patch)
- Updated debug messages to be more accurate
- Added status checks for the DPCD read/write calls
- Removed excess comments and debug messages
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/intel_dp.c | 74
autotest to ACK
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/intel_dp.c | 72 +---
drivers/gpu/drm/i915/intel_drv.h | 4 +++
2 files changed, 72 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915
This is version 2 of the patch set for Displayport compliance testing support
in the i915 driver. This implementation of compliance testing conforms to the
VESA specification Displayport Link Compliance Testing Specification (Link CTS)
1.2 Core Rev1.1. The code has been partitioned into two segme
functions for 'open' and 'write' as they
are specified in the file ops structure. The 'open' function outputs
Displayport data to the appropriate debugfs file while the 'write' function
handles parsing of user data written to that same file.
Signed-off-by:
This patch was previously part of "[PATCH 05/10] drm/i915: Add debugfs interface
for Displayport debug and compliance testing". Adds two support functions for
handling Displayport configuration parameters that are used for compliance
testing.
Signed-off-by: Todd Previte
---
drive
ted in the file ops
structure.
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/i915_debugfs.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 65b4f5e..feae100 100644
--- a/drivers/gp
This patch was previously part of "[PATCH 05/10] drm/i915: Add debugfs
interface for Displayport debug and compliance testing". This patch implements
the 'show' functions for the debugfs interface for Displayport compliance
testing.
Signed-off-by: Todd Previte
---
led,
resulting in a faied test.
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/intel_dp.c | 32 +++-
1 file changed, 19 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 3dc92a3..1b452cc 100644
--
figuration
changes from the userspace compliance application during testing.
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/i915_debugfs.c | 128
1 file changed, 128 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gp
:
- Addressed mailing list feedback
- Removed excess debug messages
- Removed extraneous comments
- Fixed formatting issues (line length > 80)
- Updated the debug message in compute_edid_checksum to output hex values
instead of decimal
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/intel_d
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