Use BSPEC values for the Audio Keep alive M and N values as included in
the cdclk BSPEC pages for display > 13
BSPEC: 54034, 55409
Cc: Kai Vehmanen
Cc: Uma Shankar
Cc: Ville Syrjälä
Signed-off-by: Taylor, Clinton A
---
drivers/gpu/drm/i915/display/intel_audio.c | 23 +--
drivers/gpu/
Using the BSPEC algorithm add addition HDMI pixel clocks to the existing
table.
Cc: Matt Roper
Cc: Radhakrishna Sripada
Signed-off-by: Taylor, Clinton A
---
drivers/gpu/drm/i915/display/intel_snps_phy.c | 1145 +
1 file changed, 1145 insertions(+)
diff --git a/drivers/gpu/drm
Using the BSPEC algorithm add addition HDMI pixel clocks to the existing
table.
v2: remove 297000 unused entry
Cc: Matt Roper
Cc: Radhakrishna Sripada
Signed-off-by: Taylor, Clinton A
---
drivers/gpu/drm/i915/display/intel_snps_phy.c | 1115 +
1 file changed, 1115 insertions
Matches tables in the bspec.
Reviewed-by: Clinton Taylor
Sorry for the top post. WFH.
-Original Message-
From: Intel-gfx On Behalf Of José
Roberto de Souza
Sent: Monday, March 30, 2020 2:01 PM
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 3/3] drm/i915/tc/icl: Upd
A to the RCS engine.
Clint
-Original Message-
From: Matt Roper
Sent: Tuesday, August 25, 2020 3:11 PM
To: Taylor, Clinton A
Cc: Intel-gfx@lists.freedesktop.org; Atwood, Matthew S
; Souza, Jose
Subject: Re: [PATCH v3] drm/i915/gt: Implement WA_1406941453
CI failed with
On Tue, Aug 25, 2
Looks like the seek=%d in the sprintf is not working. 0x11 0x0A are being
returned by the monitor from DPCD’s 0x and 0x0001 repeatedly. The first is
DPCD revision (1.1) and the second is maximum Link Rate (0x0a) which is 2.7
Gbps. You might want to do a printf of call to make sure seek is be
On Tue, 2023-07-25 at 18:27 -0300, Gustavo Sousa wrote:
> There are more parts of C10/C20 programming that need to take owned
> lanes into account. Define the function intel_cx0_get_owned_lane_mask()
> and use it. There will be new users of that function in upcoming
> changes.
>
> BSpec: 64539
> S
On Mon, 2023-09-18 at 16:06 -0500, Lucas De Marchi wrote:
> On Fri, Sep 15, 2023 at 12:50:41PM -0700, Matt Roper wrote:
> > On Fri, Sep 15, 2023 at 10:46:31AM -0700, Lucas De Marchi wrote:
> > > From: Clint Taylor
> > >
> > > We use multiple variables for HDMI and DisplayPort to store the value o
On Mon, 2023-09-18 at 15:43 -0700, Matt Roper wrote:
> On Mon, Sep 18, 2023 at 04:06:58PM -0500, Lucas De Marchi wrote:
> > On Fri, Sep 15, 2023 at 12:50:41PM -0700, Matt Roper wrote:
> > > On Fri, Sep 15, 2023 at 10:46:31AM -0700, Lucas De Marchi wrote:
> > > > From: Clint Taylor
> > > >
> > > >
On Fri, 2023-06-16 at 14:00 -0700, Radhakrishna Sripada wrote:
> The hdmi_level_shifter part of General Bytes definition in VBT, which was
> used for choosing different levels on earlier platforms is now a hidden
> optin and shows the default value of 0. The level shifter is now to be
> deduced fro
On Thu, 2023-05-18 at 19:31 +, Patchwork wrote:
> Patch Details
> Series: C20 Computed HDMI TMDS pixel clocks (rev3)
> URL: https://patchwork.freedesktop.org/series/117399/
> State:failure
> Details:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117399v3/index.html
>
Reviewed-by: Clint Taylor
-Clint
From: Intel-gfx on behalf of Khaled
Almahallawy
Sent: Friday, September 16, 2022 2:25 PM
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2] drm/i915/display: Don't disable DDI/Transcoder
when setting phy tes
Replace integrated with discrete for dgfx platforms.
v2: commit title reword (Jani)
v3: use variable name i915 (Jani)
v4: commit message reword (MattR)
Cc: Jani Nikula
Reviewed-by: Matt Roper
Signed-off-by: Taylor, Clinton A
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 7 ++-
1 file
Replace internal with discrete on dgfx platforms
Signed-off-by: Taylor, Clinton A
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
b/drivers/gpu/drm/i915/display/intel_hdmi.c
index
Replace internal with discrete of dgfx platforms.
v2: commit title reword (Jani)
Cc: Jani Nikula
Signed-off-by: Taylor, Clinton A
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
b
Replace internal with discrete of dgfx platforms.
v2: commit title reword (Jani)
v3: use variable name i915 (Jani)
Cc: Jani Nikula
Signed-off-by: Taylor, Clinton A
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu
See below
-Original Message-
From: Srivatsa, Anusha
Sent: Friday, October 28, 2022 2:32 PM
To: intel-gfx@lists.freedesktop.org
Cc: Srivatsa, Anusha ; Taylor, Clinton A
Subject: [PATCH 2/2] drm/i915/display: Add CDCLK Support for MTL
As per bSpec MTL has 38.4 MHz Reference clock
op post - webmail
-Clint
From: Kahola, Mika
Sent: Friday, October 14, 2022 5:47 AM
To: intel-gfx@lists.freedesktop.org
Cc: Kahola, Mika ; Sripada, Radhakrishna
; Deak, Imre ; Shankar,
Uma ; Taylor, Clinton A
Subject: [PATCH 06/20] drm/i915/mtl: Add vswing program
Wrong patch sent in error. PLease ignore this version.
-Clint
On Thu, 2023-03-16 at 14:46 -0700, Clint Taylor wrote:
> From: "Taylor, Clinton A"
>
> Use BSPEC values for the Audio Keep alive M and N values as included in
> the cdclk BSPEC pages for display > 13
>
Reviewed-by: Clint Taylor
-Clint
On Tue, 2024-10-08 at 15:37 -0700, Matt Atwood wrote:
> From: Suraj Kandpal
>
> From DISPLAY_VER() >= 30 C20 PHY consolidated programming table of
> DP and eDP been merged and now use the same rates and values. eDP
> over TypeC has also been introduced.
> More
On Fri, 2024-10-11 at 12:34 +0530, Pottumuttu, Sai Teja wrote:
> On 11-10-2024 03:00, Taylor, Clinton A wrote:
> > On Wed, 2024-10-09 at 22:32 +0530, Pottumuttu, Sai Teja wrote:
> > > On 05-10-2024 02:38, Clint Taylor wrote:
> > > > Some devices NAK DPCD writes
On Wed, 2024-10-09 at 22:32 +0530, Pottumuttu, Sai Teja wrote:
> On 05-10-2024 02:38, Clint Taylor wrote:
> > Some devices NAK DPCD writes to the SOURCE OUI (0x300) DPCD registers.
> > Reduce the log level priority to prevent dmesg noise for these devices.
> >
> > Signed-off-by: Clint Taylor
> >
Reviewed-by: Clint Taylor
-Clint
On Tue, 2024-10-22 at 12:50 -0300, Gustavo Sousa wrote:
> Load the DMC for Xe3LPD.
>
> Signed-off-by: Gustavo Sousa
> ---
> drivers/gpu/drm/i915/display/intel_dmc.c | 8 +++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/dr
On Thu, 2024-10-24 at 12:18 -0700, Matt Roper wrote:
> On Thu, Oct 24, 2024 at 06:08:46AM +, Kahola, Mika wrote:
> > > -Original Message-
> > > From: Intel-gfx On Behalf Of
> > > Clint
> > > Taylor
> > > Sent: Thursday, 24 October 2024 0.47
> > > To: intel-gfx@lists.freedesktop.org; i
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