[Intel-gfx] [PATCH] drm/i915: Implement PSF GV point support

2021-05-30 Thread Stanislav Lisovskiy
to 0xf, as we have now 3:2 bits for PSF GV points(Matt Roper) - Replaced val2 with NULL from PCode request, since its not being used(Matt Roper) - Replaced %d to 0x%x for better readability(thanks for spotting) Signed-off-by: Stanislav Lisovskiy Cc: Matt Roper --- drivers/gpu

[Intel-gfx] [PATCH 1/2] drm/i915: Extend QGV point restrict mask to 0x3

2021-05-30 Thread Stanislav Lisovskiy
According to BSpec there is now also a code 0x02, which corresponds to QGV point being rejected, this code so lets extend mask to check this. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/i915_reg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu

[Intel-gfx] [PATCH 2/2] drm/i915: Implement PSF GV point support

2021-05-30 Thread Stanislav Lisovskiy
to 0xf, as we have now 3:2 bits for PSF GV points(Matt Roper) - Replaced val2 with NULL from PCode request, since its not being used(Matt Roper) - Replaced %d to 0x%x for better readability(thanks for spotting) Signed-off-by: Stanislav Lisovskiy Cc: Matt Roper --- drivers/gpu

[Intel-gfx] [PATCH] INTEL_DII: drm/i915/adl_p: Same slices mask is not same Dbuf state

2021-06-01 Thread Stanislav Lisovskiy
using issues. Solution: check also mbus_join, in addition to slices mask. Cc: Ville Syrjälä Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/intel_pm.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel

[Intel-gfx] [PATCH] drm/i915/adl_p: CDCLK crawl support for ADL

2021-06-01 Thread Stanislav Lisovskiy
From: Gwan-gyeong Mun CDCLK crawl feature allows to change CDCLK frequency without disabling the actual PLL and doesn't require a full modeset. Cc: Mika Kahola Signed-off-by: Stanislav Lisovskiy Signed-off-by: Jani Nikula Signed-off-by: Gwan-gyeong Mun Cc: Stanislav Lisovskiy --- dr

[Intel-gfx] [PATCH] drm/i915/adl_p: CDCLK crawl support for ADL

2021-06-02 Thread Stanislav Lisovskiy
ahola Signed-off-by: Stanislav Lisovskiy Signed-off-by: Jani Nikula Signed-off-by: Gwan-gyeong Mun Cc: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_cdclk.c | 72 +++--- drivers/gpu/drm/i915/i915_pci.c| 1 + drivers/gpu/drm/i915/i915_reg.h

[Intel-gfx] [PATCH] drm/i915: Fix parenthesis and dbuf condition

2021-06-09 Thread Stanislav Lisovskiy
Removed excessive parenthesis and placed && on previous line in DBUF state checker. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/intel_pm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/in

[Intel-gfx] [PATCH] drm/i915/dg2: Tile 4 plane format support

2021-10-12 Thread Stanislav Lisovskiy
/I915_FORMAT_MOD_F_TILED/I915_FORMAT_MOD_4_TILED/g - Removed unneeded fencing code Cc: Imre Deak Cc: Matt Roper Cc: Maarten Lankhorst Signed-off-by: Stanislav Lisovskiy Signed-off-by: Matt Roper Signed-off-by: Juha-Pekka Heikkilä --- drivers/gpu/drm/i915/display/intel_display.c | 2

[Intel-gfx] [PATCH] drm/i915/dg2: Tile 4 plane format support

2021-10-27 Thread Stanislav Lisovskiy
c: Maarten Lankhorst Signed-off-by: Stanislav Lisovskiy Signed-off-by: Matt Roper Signed-off-by: Juha-Pekka Heikkilä --- drivers/gpu/drm/i915/display/intel_display.c | 1 + drivers/gpu/drm/i915/display/intel_fb.c | 11 ++ drivers/gpu/drm/i915/display/intel_fbc.c | 1 +

[Intel-gfx] [PATCH] drm/i915: Tile F plane format support

2021-09-23 Thread Stanislav Lisovskiy
TileF(Tile4 in bspec) format is 4K tile organized into 64B subtiles with same basic shape as for legacy TileY which will be supported by Display13. Cc: Matt Roper Cc: Maarten Lankhorst Signed-off-by: Stanislav Lisovskiy Signed-off-by: Matt Roper Signed-off-by: Juha-Pekka Heikkilä

[Intel-gfx] [PATCH] drm/i915: Tile F plane format support

2021-09-23 Thread Stanislav Lisovskiy
Lankhorst Signed-off-by: Stanislav Lisovskiy Signed-off-by: Matt Roper Signed-off-by: Juha-Pekka Heikkilä --- drivers/gpu/drm/i915/display/intel_display.c | 3 ++ drivers/gpu/drm/i915/display/intel_fb.c | 12 +- drivers/gpu/drm/i915/display/intel_fbc.c | 1 + .../drm/i915

[Intel-gfx] [PATCH] drm/i915: Implement PSF GV point support

2021-05-20 Thread Stanislav Lisovskiy
GV point, based on the current video mode requirements. Bspec: 64631, 53998 Signed-off-by: Stanislav Lisovskiy Cc: Matt Roper --- drivers/gpu/drm/i915/display/intel_bw.c | 100 +++- drivers/gpu/drm/i915/i915_drv.h | 7 ++ drivers/gpu/drm/i915/i915_reg.h | 3

[Intel-gfx] [PATCH] drm/i915: Implement PSF GV point support

2021-05-21 Thread Stanislav Lisovskiy
mask/unmask only those which are returned, trying to manipulate those beyond causes a failure from PCode. So switched back to generating mask from 1 - num_qgv_points, where num_qgv_points is the actual amount of points, advertised by PCode. Signed-off-by: Stanislav Lisovskiy Cc

[Intel-gfx] [PATCH] drm/i915/adl_p: Same slices mask is not same Dbuf state

2021-05-27 Thread Stanislav Lisovskiy
using issues. Solution: check also mbus_join, in addition to slices mask. Cc: Ville Syrjälä Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/intel_pm.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel

[Intel-gfx] [PATCH] Implement PSF GV point support

2021-04-26 Thread Stanislav Lisovskiy
and commit message(Matt) v3: - s/adl_/adls_/ - Matt Roper - Do not return error but just zero qi->num_psf_points, if we can't get PSF GV points(Matt Roper) - s/GEN13_/ADLS_/ - Matt Roper Signed-off-by: Stanislav Lisovskiy Reviewed-by: Matt Roper --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH] Implement PSF GV point support

2021-04-27 Thread Stanislav Lisovskiy
GV point, based on the current video mode requirements. Bspec: 64631, 53998 Signed-off-by: Stanislav Lisovskiy Cc: Matt Roper --- drivers/gpu/drm/i915/display/intel_bw.c | 100 +++- drivers/gpu/drm/i915/i915_drv.h | 7 ++ drivers/gpu/drm/i915/i915_reg.h | 3

[Intel-gfx] [PATCH] drm/i915: Fix bug for GeminiLake

2019-04-29 Thread Stanislav Lisovskiy
When CDCLK is as low as 79200, picture gets unstable, while DSI and DE pll values were confirmed to be correct. Limiting to 158400 as agreed with Ville. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/intel_cdclk.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers

[Intel-gfx] [PATCH v2] drm/i915: Corrupt DSI picture fix for GeminiLake

2019-04-29 Thread Stanislav Lisovskiy
start to be usable again, with current drm-tip. v2: Fixed commit subject as suggested. Signed-off-by: Stanislav Lisovskiy Acked-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_cdclk.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu

[Intel-gfx] [PATCH v3] drm/i915: Corrupt DSI picture fix for GeminiLake

2019-04-30 Thread Stanislav Lisovskiy
start to be usable again, with current drm-tip. v2: Fixed commit subject as suggested. v3: Added generic bugs(crc failures, screen not init for GLK DSI which might be affected). Signed-off-by: Stanislav Lisovskiy Acked-by: Ville Syrjälä Generic bugs affected: https://bugs.freedesktop.org

[Intel-gfx] [PATCH v4] drm/i915: Corrupt DSI picture fix for GeminiLake

2019-04-30 Thread Stanislav Lisovskiy
start to be usable again, with current drm-tip. v2: Fixed commit subject as suggested. v3: Added generic bugs(crc failures, screen not init for GLK DSI which might be affected). v4: Added references tag for bugs affected. Signed-off-by: Stanislav Lisovskiy Acked-by: Ville Syrjälä References

[Intel-gfx] [PATCH] Return only active connectors for GET_RESOURCES

2018-11-28 Thread Stanislav Lisovskiy
displays staying blank after quick unplugging and plugging back(bug #106250). Returning only active DP connectors fixes the issue. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106250 Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/drm_mode_config.c | 16 +++- 1 file

[Intel-gfx] [PATCH v2] Return only active connectors for get_resources ioctl

2018-11-28 Thread Stanislav Lisovskiy
displays staying blank after quick unplugging and plugging back(bug #106250). Returning only active DP connectors fixes the issue. v2: Removed caps from the title Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106250 Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm

[Intel-gfx] [PATCH v3] Return only active connectors for get_resources ioctl

2018-11-29 Thread Stanislav Lisovskiy
://bugs.freedesktop.org/show_bug.cgi?id=106250 Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/drm_mode_config.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c index ee80788f2c40..3e2cd959a66a 100644 --- a/drivers/gpu/drm

[Intel-gfx] [PATCH] drm/i915/icl: Fix pipe config mismatch warnings

2018-12-07 Thread Stanislav Lisovskiy
Fixes hblank, vblank, vsync_start/vsync_end, hsync_start//hsync_end, pipe_bpp, port clock, pixel rate mismatches for dsi which happen during pipe_config comparation in intel_atomic_check. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/icl_dsi.c | 93

[Intel-gfx] [PATCH v2] drm/i915/icl: Fix pipe config mismatch warnings

2018-12-07 Thread Stanislav Lisovskiy
: Stanislav Lisovskiy --- drivers/gpu/drm/i915/icl_dsi.c | 90 +- 1 file changed, 78 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c index 4dd793b78996..951c9823b971 100644 --- a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH v4 0/3] Send a hotplug when edid changes

2019-09-05 Thread Stanislav Lisovskiy
hotplug event. Stanislav Lisovskiy (3): drm: Add helper to compare edids. drm: Introduce change counter to drm_connector drm/i915: Send hotplug event if edid had changed. drivers/gpu/drm/drm_connector.c | 17 + drivers/gpu/drm/drm_edid.c | 36

[Intel-gfx] [PATCH v4 2/3] drm: Introduce change counter to drm_connector

2019-09-05 Thread Stanislav Lisovskiy
://bugs.freedesktop.org/show_bug.cgi?id=105540 Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/drm_connector.c| 1 + drivers/gpu/drm/drm_probe_helper.c | 29 +++-- include/drm/drm_connector.h| 3 +++ 3 files changed, 31 insertions(+), 2 deletions(-) diff --git a

[Intel-gfx] [PATCH v4 3/3] drm/i915: Send hotplug event if edid had changed.

2019-09-05 Thread Stanislav Lisovskiy
ug.cgi?id=105540 Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/drm_connector.c | 16 +++ drivers/gpu/drm/drm_edid.c | 3 +++ drivers/gpu/drm/drm_probe_helper.c | 2 +- drivers/gpu/drm/i915/display/intel_hotplug.c | 21 +++--

[Intel-gfx] [PATCH v4 1/3] drm: Add helper to compare edids.

2019-09-05 Thread Stanislav Lisovskiy
Many drivers would benefit from using drm helper to compare edid, rather than bothering with own implementation. v2: Added documentation for this function. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/drm_edid.c | 33 + include/drm/drm_edid.h | 9

[Intel-gfx] [PATCH v5 0/3] Send a hotplug when edid changes

2019-09-05 Thread Stanislav Lisovskiy
hotplug event. Stanislav Lisovskiy (3): drm: Add helper to compare edids. drm: Introduce change counter to drm_connector drm/i915: Send hotplug event if edid had changed. drivers/gpu/drm/drm_connector.c | 16 + drivers/gpu/drm/drm_edid.c | 36

[Intel-gfx] [PATCH v5 1/3] drm: Add helper to compare edids.

2019-09-05 Thread Stanislav Lisovskiy
Many drivers would benefit from using drm helper to compare edid, rather than bothering with own implementation. v2: Added documentation for this function. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/drm_edid.c | 33 + include/drm/drm_edid.h | 9

[Intel-gfx] [PATCH v5 3/3] drm/i915: Send hotplug event if edid had changed.

2019-09-05 Thread Stanislav Lisovskiy
k line Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105540 Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/drm_connector.c | 15 ++ drivers/gpu/drm/drm_edid.c | 5 - drivers/gpu/drm/drm_probe_helper.c | 2 +- drivers/gpu/dr

[Intel-gfx] [PATCH v5 2/3] drm: Introduce change counter to drm_connector

2019-09-05 Thread Stanislav Lisovskiy
://bugs.freedesktop.org/show_bug.cgi?id=105540 Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/drm_connector.c| 1 + drivers/gpu/drm/drm_probe_helper.c | 29 +++-- include/drm/drm_connector.h| 3 +++ 3 files changed, 31 insertions(+), 2 deletions(-) diff --git a

[Intel-gfx] [PATCH v6 1/3] drm: Add helper to compare edids.

2019-09-06 Thread Stanislav Lisovskiy
Many drivers would benefit from using drm helper to compare edid, rather than bothering with own implementation. v2: Added documentation for this function. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/drm_edid.c | 33 + include/drm/drm_edid.h | 9

[Intel-gfx] [PATCH v6 3/3] drm/i915: Send hotplug event if edid had changed

2019-09-06 Thread Stanislav Lisovskiy
v6: Removed drm specific part from this patch, leaving only i915 specific changes here. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_hotplug.c | 18 +- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display

[Intel-gfx] [PATCH v6 0/3] Send a hotplug when edid changes

2019-09-06 Thread Stanislav Lisovskiy
hotplug event. Stanislav Lisovskiy (3): drm: Add helper to compare edids. drm: Introduce epoch counter to drm_connector drm/i915: Send hotplug event if edid had changed drivers/gpu/drm/drm_connector.c | 16 + drivers/gpu/drm/drm_edid.c | 36

[Intel-gfx] [PATCH v6 2/3] drm: Introduce epoch counter to drm_connector

2019-09-06 Thread Stanislav Lisovskiy
and not right after edid is actually updated. v2: Added documentation for the new counter. Rename change_counter to epoch_counter. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105540 Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/drm_connector.c| 16

[Intel-gfx] [PATCH v1] drm/i915: List modes, regardless of encoder presence

2019-09-06 Thread Stanislav Lisovskiy
In certain situations encoder might be not present for connector, however might be useful to displat probed modes for the connector, if any. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/i915_debugfs.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a

[Intel-gfx] [PATCH v2] drm/i915: List modes, regardless of encoder presence

2019-09-06 Thread Stanislav Lisovskiy
In certain situations encoder might be not present for connector, however might be useful to display probed modes for the connector, if any. v2: Fixed typo in the commit message Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/i915_debugfs.c | 8 1 file changed, 4

[Intel-gfx] [PATCH v1] drm/i915: Add more debug information to dp aux code

2019-09-06 Thread Stanislav Lisovskiy
Quite many issues currently happen during intel_dp_detect during dpcd read. Sometimes we can only see that it had failed in the logs, while no actual reason is available. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_dp.c | 9 - 1 file changed, 8 insertions

[Intel-gfx] [PATCH v1] drm/i915: Add TigerLake bandwidth checking

2019-09-17 Thread Stanislav Lisovskiy
Added bandwidth calculation algorithm and checks, similar way as it was done for ICL, some constants were corrected according to BSpec. Signed-off-by: Stanislav Lisovskiy Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=111600 --- drivers/gpu/drm/i915/display/intel_bw.c | 108

[Intel-gfx] [PATCH v2] drm/i915: Add TigerLake bandwidth checking

2019-09-18 Thread Stanislav Lisovskiy
Added bandwidth calculation algorithm and checks, similar way as it was done for ICL, some constants were corrected according to BSpec. Signed-off-by: Stanislav Lisovskiy v2: Start using same icl_get_bw_info function to avoid code duplication. Moved mpagesize to memory info related

[Intel-gfx] [PATCH v3] drm/i915: Add TigerLake bandwidth checking

2019-09-18 Thread Stanislav Lisovskiy
Added bandwidth calculation algorithm and checks, similar way as it was done for ICL, some constants were corrected according to BSpec. Signed-off-by: Stanislav Lisovskiy v2: Start using same icl_get_bw_info function to avoid code duplication. Moved mpagesize to memory info related

[Intel-gfx] [PATCH v4] drm/i915: Add TigerLake bandwidth checking

2019-09-20 Thread Stanislav Lisovskiy
: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_bw.c | 26 + 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c index 688858ebe4d0..cd58e47ab7b2 100644 --- a/drivers/gpu/drm

[Intel-gfx] [PATCH v4] drm/i915: Add TigerLake bandwidth checking

2019-09-20 Thread Stanislav Lisovskiy
Ausmus Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_bw.c | 26 + 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c index 688858ebe4d0..cd58e47ab7b2

[Intel-gfx] [PATCH v1] drm/i915: Restrict qgv points which don't have enough bandwidth.

2019-09-20 Thread Stanislav Lisovskiy
According to BSpec 53998, we should try to restrict qgv points, which can't provide enough bandwidth for desired display configuration. Currently we are just comparing against all of those and take minimum(worst case). Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/di

[Intel-gfx] [PATCH v2] drm/i915: Restrict qgv points which don't have enough bandwidth.

2019-09-20 Thread Stanislav Lisovskiy
d-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_bw.c | 58 +++-- drivers/gpu/drm/i915/i915_reg.h | 3 ++ 2 files changed, 58 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel

[Intel-gfx] [PATCH v3] drm/i915: Restrict qgv points which don't have enough bandwidth.

2019-09-25 Thread Stanislav Lisovskiy
orbid simultaneous legacy SAGV PCode requests and restricting qgv points. Put the actual restriction to commit function, added serialization(thanks to Ville) to prevent commit being applied out of order in case of nonblocking and/or nomodeset commits. Signed-off-by: Stanislav Lisovski

[Intel-gfx] [PATCH v1 0/3] Send a hotplug when edid changes

2019-06-27 Thread Stanislav Lisovskiy
hotplug event. Stanislav Lisovskiy (3): drm: Add helper to compare edids. drm: Introduce change counter to drm_connector drm/i915: Send hotplug event if edid had changed. drivers/gpu/drm/drm_connector.c | 1 + drivers/gpu/drm/drm_edid.c | 26

[Intel-gfx] [PATCH v1 1/3] drm: Add helper to compare edids.

2019-06-27 Thread Stanislav Lisovskiy
Many drivers would benefit from using drm helper to compare edid, rather than bothering with own implementation. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/drm_edid.c | 26 ++ include/drm/drm_edid.h | 2 ++ 2 files changed, 28 insertions(+) diff --git a

[Intel-gfx] [PATCH v1 2/3] drm: Introduce change counter to drm_connector

2019-06-27 Thread Stanislav Lisovskiy
example hotplug event. Currently there is no way to propagate that to a calling layer, as we send only connection_status update, however as we see with edid the changes can be broader. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105540 Signed-off-by: Stanislav Lisovskiy --- drivers/gpu

[Intel-gfx] [PATCH v1 3/3] drm/i915: Send hotplug event if edid had changed.

2019-06-27 Thread Stanislav Lisovskiy
105540 Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_dp.c | 16 +++- drivers/gpu/drm/i915/display/intel_hdmi.c| 16 +--- drivers/gpu/drm/i915/display/intel_hotplug.c | 20 +++- 3 files changed, 43 insertions(+), 9 del

[Intel-gfx] [PATCH v2 0/3] Send a hotplug when edid changes

2019-06-28 Thread Stanislav Lisovskiy
hotplug event. Stanislav Lisovskiy (3): drm: Add helper to compare edids. drm: Introduce change counter to drm_connector drm/i915: Send hotplug event if edid had changed. drivers/gpu/drm/drm_connector.c | 1 + drivers/gpu/drm/drm_edid.c | 33

[Intel-gfx] [PATCH v2 1/3] drm: Add helper to compare edids.

2019-06-28 Thread Stanislav Lisovskiy
Many drivers would benefit from using drm helper to compare edid, rather than bothering with own implementation. v2: Added documentation for this function. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/drm_edid.c | 33 + include/drm/drm_edid.h | 9

[Intel-gfx] [PATCH v2 3/3] drm/i915: Send hotplug event if edid had changed.

2019-06-28 Thread Stanislav Lisovskiy
e name. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105540 Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_dp.c | 16 +++- drivers/gpu/drm/i915/display/intel_hdmi.c| 16 +--- drivers/gpu/drm/i915/display/intel_hotplug.

[Intel-gfx] [PATCH v2 2/3] drm: Introduce change counter to drm_connector

2019-06-28 Thread Stanislav Lisovskiy
://bugs.freedesktop.org/show_bug.cgi?id=105540 Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/drm_connector.c| 1 + drivers/gpu/drm/drm_probe_helper.c | 29 +++-- include/drm/drm_connector.h| 3 +++ 3 files changed, 31 insertions(+), 2 deletions(-) diff --git a

[Intel-gfx] [PATCH] drm/i915: Fix wrong escape clock divisor init for GLK

2019-07-10 Thread Stanislav Lisovskiy
According to Bspec clock divisor registers in GeminiLake should be initialized by shifting 1(<<) to amount of correspondent divisor. While i915 was writing all this time that value as is. Surprisingly that it by accident worked, until we met some issues with Microtech Etab. Signed-off-by: stanisl

[Intel-gfx] [PATCH v2] drm/i915: Fix wrong escape clock divisor init for GLK

2019-07-11 Thread Stanislav Lisovskiy
According to Bspec clock divisor registers in GeminiLake should be initialized by shifting 1(<<) to amount of correspondent divisor. While i915 was writing all this time that value as is. Surprisingly that it by accident worked, until we met some issues with Microtech Etab. v2: Added Fixes tag an

[Intel-gfx] [PATCH 0/1] Do not enable PSR2 if no active planes

2022-06-14 Thread Stanislav Lisovskiy
We seem to cause FIFO underruns by doing that. Also it doesn't make sense. Stanislav Lisovskiy (1): drm/i915: Do not enable PSR2/selective fetch if there are no planes drivers/gpu/drm/i915/display/intel_psr.c | 6 ++ 1 file changed, 6 insertions(+) -- 2.24.1.485.gad05a3d8e5

[Intel-gfx] [PATCH 1/1] drm/i915: Do not enable PSR2/selective fetch if there are no planes

2022-06-14 Thread Stanislav Lisovskiy
We seem to enable PSR2 and selective fetch even if there are no active planes. That seems to causes FIFO underruns at least for ADLP. Those are gone if we don't do that. Just adding simple check in intel_psr2_sel_fetch_config_valid seems to do the trick. Signed-off-by: Stanislav Liso

[Intel-gfx] [PATCH 1/1] drm/i915/dg2: Bump up CDCLK for DG2

2022-06-14 Thread Stanislav Lisovskiy
We seem to need this W/A same way as for TGL, in order to fix some of the underruns, which we currently have and those not related to PSR. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_cdclk.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a

[Intel-gfx] [PATCH 0/1] Bump up CDCLK for DG2

2022-06-14 Thread Stanislav Lisovskiy
We set it to be equal to pixel rate here, just same as we have already for TGL, as that seems to be currently the only solution to fix underruns, not related to PSR. Stanislav Lisovskiy (1): drm/i915/dg2: Bump up CDCLK for DG2 drivers/gpu/drm/i915/display/intel_cdclk.c | 4 ++-- 1 file

[Intel-gfx] [PATCH 1/4] drm/i915: Pass plane to watermark calculation functions

2021-12-07 Thread Stanislav Lisovskiy
Sometimes we might need to change the way we calculate watermarks, based on which particular plane it is calculated for. Thus it would be convenient to pass plane struct to those functions. v2: Pass plane instead of plane_id Signed-off-by: Stanislav Lisovskiy --- .../gpu/drm/i915/display

[Intel-gfx] [PATCH 2/4] drm/i915: Introduce do_async_flip flag to intel_plane_state

2021-12-07 Thread Stanislav Lisovskiy
There might be various logical contructs when we might want to enable async flip, so lets calculate those and set this flag, so that there is no need in long conditions in other places. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_atomic_plane.c | 2 +- drivers/gpu

[Intel-gfx] [PATCH 3/4] drm/i915: Use wm0 only during async flips for DG2

2021-12-07 Thread Stanislav Lisovskiy
ndant new_plane_state->do_async_flip check from needs_async_flip_wm_override condition (Ville Syrjälä) - Extract dg2_async_flip_optimization to separate function(Ville Syrjälä) - Check for plane->async_flip instead of plane_id (Ville Syrjälä) Signed-off-by: Stanisla

[Intel-gfx] [PATCH 4/4] drm/i915: Don't allocate extra ddb during async flip for DG2

2021-12-07 Thread Stanislav Lisovskiy
In terms of async flip optimization we don't to allocate extra ddb space, so lets skip it. v2: - Extracted min ddb async flip check to separate function (Ville Syrjälä) - Used this function to prevent false positive WARN to be triggered(Ville Syrjälä) Signed-off-by: Stan

[Intel-gfx] [PATCH 2/2] drm/i915/dg2: Tile 4 plane format support

2021-12-09 Thread Stanislav Lisovskiy
description for Tile 4 in drm uapi header(Nanley Chery) v4: - Extracted drm_fourcc changes to separate patch(Nanley Chery) Cc: Matt Roper Cc: Maarten Lankhorst Signed-off-by: Stanislav Lisovskiy Signed-off-by: Matt Roper Signed-off-by: Juha-Pekka Heikkilä --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH 1/2] drm/i915: Introduce new Tile 4 format

2021-12-09 Thread Stanislav Lisovskiy
64B x 8 rows. Signed-off-by: Stanislav Lisovskiy --- include/uapi/drm/drm_fourcc.h | 11 +++ 1 file changed, 11 insertions(+) diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index 7f652c96845b..a146c6df1066 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b

[Intel-gfx] [PATCH] drm/i915/dg2: Use I915_BO_ALLOC_CONTIGUOUS flag for DPT

2021-12-09 Thread Stanislav Lisovskiy
Do mapping using CONTIGUOUS flag - otherwise i915_gem_object_is_contiguous warn is triggered. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_dpt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c b/drivers

[Intel-gfx] [PATCH] drm/i915: Recalculate CDCLK if plane scaling ratio changes

2022-01-11 Thread Stanislav Lisovskiy
affects display buffer bandwidth requirements. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_display.c | 63 +++- 1 file changed, 60 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display

[Intel-gfx] [PATCH] drm/i915: Recalculate CDCLK if plane scaling ratio changes

2022-01-12 Thread Stanislav Lisovskiy
affects display buffer bandwidth requirements. v2: - Removed excessive debugs(Jani Nikula) - Switched to drm_dbg_kms(Jani Nikula) Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_display.c | 56 ++-- 1 file changed, 53 insertions(+), 3 deletions(-) diff

[Intel-gfx] [PATCH] drm/i915: Use i915_gem_object_pin_map_unlocked function for lmem allocation

2022-01-14 Thread Stanislav Lisovskiy
Using i915_gem_object_pin_map_unlocked instead of i915_gem_object_lmem_io_map, would eliminate the need of using I915_BO_ALLOC_CONTIGUOUS, when calling i915_vma_pin_iomap, because it supports non-contiguous allocation as well. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH 0/4] Async flip optimization for DG2

2022-01-18 Thread Stanislav Lisovskiy
Limitting the WM levels to 0 for DG2 during async flips, allows to slightly increase the perfomance, as recommended by HW team. Stanislav Lisovskiy (4): drm/i915: Pass plane to watermark calculation functions drm/i915: Introduce do_async_flip flag to intel_plane_state drm/i915: Use wm0 only

[Intel-gfx] [PATCH 1/4] drm/i915: Pass plane to watermark calculation functions

2022-01-18 Thread Stanislav Lisovskiy
Sometimes we might need to change the way we calculate watermarks, based on which particular plane it is calculated for. Thus it would be convenient to pass plane struct to those functions. v2: Pass plane instead of plane_id Signed-off-by: Stanislav Lisovskiy --- .../gpu/drm/i915/display

[Intel-gfx] [PATCH 2/4] drm/i915: Introduce do_async_flip flag to intel_plane_state

2022-01-18 Thread Stanislav Lisovskiy
-initialized, but set explicitly, so that the logic is clear as well. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_atomic_plane.c | 2 +- drivers/gpu/drm/i915/display/intel_display.c | 5 + drivers/gpu/drm/i915/display/intel_display_types.h | 3 +++ 3 files

[Intel-gfx] [PATCH 4/4] drm/i915: Don't allocate extra ddb during async flip for DG2

2022-01-18 Thread Stanislav Lisovskiy
In terms of async flip optimization we don't to allocate extra ddb space, so lets skip it. v2: - Extracted min ddb async flip check to separate function (Ville Syrjälä) - Used this function to prevent false positive WARN to be triggered(Ville Syrjälä) Signed-off-by: Stan

[Intel-gfx] [PATCH 3/4] drm/i915: Use wm0 only during async flips for DG2

2022-01-18 Thread Stanislav Lisovskiy
ndant new_plane_state->do_async_flip check from needs_async_flip_wm_override condition (Ville Syrjälä) - Extract dg2_async_flip_optimization to separate function(Ville Syrjälä) - Check for plane->async_flip instead of plane_id (Ville Syrjälä) Signed-off-by: Stanisla

[Intel-gfx] [PATCH 0/2] Tile 4 format support

2022-01-18 Thread Stanislav Lisovskiy
Tile4 in bspec format is 4K tile organized into 64B subtiles with same basic shape as for legacy TileY. Stanislav Lisovskiy (2): drm/i915: Introduce new Tile 4 format drm/i915/dg2: Tile 4 plane format support drivers/gpu/drm/i915/display/intel_display.c | 1 + drivers/gpu/drm/i915/display

[Intel-gfx] [PATCH 0/2] Tile 4 format support

2022-01-18 Thread Stanislav Lisovskiy
Tile4 in bspec format is 4K tile organized into 64B subtiles with same basic shape as for legacy TileY. Stanislav Lisovskiy (2): drm/i915: Introduce new Tile 4 format drm/i915/dg2: Tile 4 plane format support drivers/gpu/drm/i915/display/intel_display.c | 1 + drivers/gpu/drm/i915/display

[Intel-gfx] [PATCH 1/2] drm/i915: Introduce new Tile 4 format

2022-01-18 Thread Stanislav Lisovskiy
64B x 8 rows. Reviewed-by: Imre Deak Acked-by: Nanley Chery Signed-off-by: Stanislav Lisovskiy --- include/uapi/drm/drm_fourcc.h | 11 +++ 1 file changed, 11 insertions(+) diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index fc0c1454d275..b73fe6797fc3

[Intel-gfx] [PATCH 2/2] drm/i915/dg2: Tile 4 plane format support

2022-01-18 Thread Stanislav Lisovskiy
description for Tile 4 in drm uapi header(Nanley Chery) v4: - Extracted drm_fourcc changes to separate patch(Nanley Chery) Reviewed-by: Imre Deak Cc: Matt Roper Cc: Maarten Lankhorst Signed-off-by: Stanislav Lisovskiy Signed-off-by: Matt Roper Signed-off-by: Juha-Pekka Heikkilä

[Intel-gfx] [PATCH 1/2] drm: Add missing DP DSC extended capability definitions.

2022-03-17 Thread Stanislav Lisovskiy
Adding DP DSC register definitions, we might need for further DSC implementation, supporting MST and DP branch pass-through mode. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/dp/drm_dp.c| 25 + include/drm/dp/drm_dp_helper.h | 11 ++- 2 files

[Intel-gfx] [PATCH 0/2] Add DP MST DSC support to i915

2022-03-17 Thread Stanislav Lisovskiy
Currently we have only DSC support for DP SST. Stanislav Lisovskiy (2): drm: Add missing DP DSC extended capability definitions. drm/i915: Add DSC support to MST path drivers/gpu/drm/dp/drm_dp.c | 25 drivers/gpu/drm/i915/display/intel_dp.c | 138

[Intel-gfx] [PATCH 1/2] drm: Add missing DP DSC extended capability definitions.

2022-03-17 Thread Stanislav Lisovskiy
Adding DP DSC register definitions, we might need for further DSC implementation, supporting MST and DP branch pass-through mode. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/dp/drm_dp.c| 25 + include/drm/dp/drm_dp_helper.h | 11 ++- 2 files

[Intel-gfx] [PATCH 2/2] drm/i915: Add DSC support to MST path

2022-03-17 Thread Stanislav Lisovskiy
sting purposes(Manasi Navare) - Properly process ret == EDEADLK, thus fixing the regression caused by WARN triggered with modeset_lock. v5: - Removed redundant check(Imre Deak) Acked-by: Imre Deak Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_dp.c

[Intel-gfx] [PATCH] drm/i915/adl_p: Increase CDCLK by 15% if PSR2 is used

2022-03-18 Thread Stanislav Lisovskiy
Alderlake. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_cdclk.c | 13 + 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index fda8b701..095b79950788 100644 --- a/drive

[Intel-gfx] [PATCH] drm/i915/adl_p: Increase CDCLK by 15% if PSR2 is used

2022-03-18 Thread Stanislav Lisovskiy
Alderlake. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_cdclk.c | 13 + 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index fda8b701..095b79950788 100644 --- a/drive

[Intel-gfx] [PATCH 1/2] drm: Add missing DP DSC extended capability definitions.

2022-03-21 Thread Stanislav Lisovskiy
Adding DP DSC register definitions, we might need for further DSC implementation, supporting MST and DP branch pass-through mode. v2: - Fixed checkpatch comment warning Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/dp/drm_dp.c| 25 + include/drm/dp

[Intel-gfx] [PATCH 0/2] Add DP MST DSC support to i915

2022-03-21 Thread Stanislav Lisovskiy
Currently we have only DSC support for DP SST. Stanislav Lisovskiy (2): drm: Add missing DP DSC extended capability definitions. drm/i915: Add DSC support to MST path drivers/gpu/drm/dp/drm_dp.c | 25 drivers/gpu/drm/i915/display/intel_dp.c | 75

[Intel-gfx] [PATCH 2/2] drm/i915: Add DSC support to MST path

2022-03-21 Thread Stanislav Lisovskiy
ndant check(Imre Deak) v6: Removed intel_dp_mst_dsc_compute_config and refactored intel_dp_dsc_compute_config to support timeslots as a parameter(Ville Syrjälä) Acked-by: Imre Deak Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_dp.c | 75 +- dr

[Intel-gfx] [PATCH] drm/i915/adl_p: Increase CDCLK by 15% if PSR2 is used

2022-03-21 Thread Stanislav Lisovskiy
rlake. v2: - Added comment(Jose Souza) - Fixed 15% calculation(Jose Souza) Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_cdclk.c | 26 ++ 1 file changed, 26 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gp

[Intel-gfx] [PATCH 0/2] Add DP MST DSC support to i915

2022-03-21 Thread Stanislav Lisovskiy
Currently we have only DSC support for DP SST. Stanislav Lisovskiy (2): drm: Add missing DP DSC extended capability definitions. drm/i915: Add DSC support to MST path drivers/gpu/drm/dp/drm_dp.c | 25 drivers/gpu/drm/i915/display/intel_dp.c | 75

[Intel-gfx] [PATCH 1/2] drm: Add missing DP DSC extended capability definitions.

2022-03-21 Thread Stanislav Lisovskiy
Adding DP DSC register definitions, we might need for further DSC implementation, supporting MST and DP branch pass-through mode. v2: - Fixed checkpatch comment warning Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/dp/drm_dp.c| 25 + include/drm/dp

[Intel-gfx] [PATCH 2/2] drm/i915: Add DSC support to MST path

2022-03-21 Thread Stanislav Lisovskiy
d-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_dp.c | 75 +- drivers/gpu/drm/i915/display/intel_dp.h | 17 +++ drivers/gpu/drm/i915/display/intel_dp_mst.c | 143 3 files changed, 191 insertions(+), 44 deletions(-) diff --git a/drivers/gp

[Intel-gfx] [PATCH] drm/i915: Write zero wms if we disable planes for icl+

2022-05-18 Thread Stanislav Lisovskiy
Otherwise we seem to get FIFO underruns. It is being disabled anyway, so kind of logical to write those as zeroes, even if disabling is temporary. Signed-off-by: Stanislav Lisovskiy --- .../drm/i915/display/skl_universal_plane.c| 2 +- drivers/gpu/drm/i915/intel_pm.c | 46

[Intel-gfx] [PATCH 0/2] Add DP MST DSC support to i915

2022-08-10 Thread Stanislav Lisovskiy
Currently we have only DSC support for DP SST. Stanislav Lisovskiy (2): drm: Add missing DP DSC extended capability definitions. drm/i915: Add DSC support to MST path drivers/gpu/drm/i915/display/intel_dp.c | 76 +- drivers/gpu/drm/i915/display/intel_dp.h | 17 +++ drivers

[Intel-gfx] [PATCH 1/2] drm: Add missing DP DSC extended capability definitions.

2022-08-10 Thread Stanislav Lisovskiy
Adding DP DSC register definitions, we might need for further DSC implementation, supporting MST and DP branch pass-through mode. v2: - Fixed checkpatch comment warning v3: - Removed function which is not yet used(Jani Nikula) Signed-off-by: Stanislav Lisovskiy --- include/drm/display/drm_dp.h

[Intel-gfx] [PATCH 2/2] drm/i915: Add DSC support to MST path

2022-08-10 Thread Stanislav Lisovskiy
) v3: - Rebased - Added a debug to see that we at least try reserving VCPI slots using DSC, because currently its not visible from the logs, thus making debugging more tricky. - Moved timeslots to numerator, where it should be. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm

[Intel-gfx] [PATCH 0/2] Add DP MST DSC support to i915

2022-08-15 Thread Stanislav Lisovskiy
Currently we have only DSC support for DP SST. Stanislav Lisovskiy (2): drm: Add missing DP DSC extended capability definitions. drm/i915: Add DSC support to MST path drivers/gpu/drm/i915/display/intel_dp.c | 76 -- drivers/gpu/drm/i915/display/intel_dp.h | 17 +++ drivers

[Intel-gfx] [PATCH 1/2] drm: Add missing DP DSC extended capability definitions.

2022-08-15 Thread Stanislav Lisovskiy
Adding DP DSC register definitions, we might need for further DSC implementation, supporting MST and DP branch pass-through mode. v2: - Fixed checkpatch comment warning v3: - Removed function which is not yet used(Jani Nikula) Signed-off-by: Stanislav Lisovskiy --- include/drm/display/drm_dp.h

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