[Intel-gfx] [PATCH v2 1/4] drm/i915: Change gamma/degamma_lut_size data type to u32

2019-04-30 Thread Shashank Sharma
ille Syrjälä Cc: Maarten Lankhorst Cc: Uma Shankar Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_device_info.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 5a2e17d6

[Intel-gfx] [PATCH v2 0/4] Enable Multi-segmented-gamma for ICL

2019-04-30 Thread Shashank Sharma
This patch series enables programming of Multi-segmented-gamma palette for ICL. Shashank Sharma (3): drm/i915: Change gamma/degamma_lut_size data type to u32 drm/i915: Rename ivb_load_lut_10_max drm/i915/icl: Add Multi-segmented gamma support Uma Shankar (1): drm/i915/icl: Add register

[Intel-gfx] [PATCH v2 2/4] drm/i915/icl: Add register definitions for Multi Segmented gamma

2019-04-30 Thread Shashank Sharma
ned-off-by: Uma Shankar Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/i915_reg.h | 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 6f0a0866c802..7d10b8d00d64 100644 --- a/drivers/gpu/drm/i915/

[Intel-gfx] [PATCH v2 3/4] drm/i915: Rename ivb_load_lut_10_max

2019-04-30 Thread Shashank Sharma
This patch renames function ivb_load_lut_10_max to ivb_load_lut_ext_max. Cc: Uma Shankar Suggested-by: Ville Syrjala Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH v2 4/4] drm/i915/icl: Add Multi-segmented gamma support

2019-04-30 Thread Shashank Sharma
Suggested-by: Ville Syrjälä Signed-off-by: Shashank Sharma Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/i915_pci.c| 3 +- drivers/gpu/drm/i915/intel_color.c | 125 - 2 files changed, 123 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i9

[Intel-gfx] [PATCH] drm/i915/GLK: Properly handle plane CSC for BT2020 framebuffers

2019-05-02 Thread Shashank Sharma
enables the corresponding color conversion mode on plane CSC. PS: renamed variable plane_color_ctl to color_ctl for 80 char stuff. Cc: Ville Syrjala Cc: Maarten Lankhorst Cc: Uma Shankar Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_display.c | 26 -- 1 file

[Intel-gfx] [PATCH v2] drm/i915/GLK: Properly handle plane CSC for BT2020 framebuffers

2019-05-02 Thread Shashank Sharma
enables the corresponding color conversion mode on plane CSC. PS: renamed variable plane_color_ctl to color_ctl for 80 char stuff. V2: Expose the YCBCR_BT2020 value in enum values of supported encoding formats. Cc: Ville Syrjala Cc: Maarten Lankhorst Cc: Uma Shankar Signed-off-by: Shashank

[Intel-gfx] [PATCH] drm/i915/icl: Handle YCbCr to RGB conversion for BT2020 case

2019-05-07 Thread Shashank Sharma
From: Uma Shankar Currently input csc for YCbCR to RGB conversion handles only BT601 and Bt709. Extending it to support BT2020 as well. Signed-off-by: Uma Shankar Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_sprite.c | 24 1 file changed, 24

[Intel-gfx] [PATCH v3 1/2] drm/i915/GLK: Properly handle plane CSC for BT2020 framebuffers

2019-05-07 Thread Shashank Sharma
: Ville Syrjala Cc: Maarten Lankhorst Cc: Uma Shankar Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_display.c | 26 -- drivers/gpu/drm/i915/intel_sprite.c | 10 -- 2 files changed, 24 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm

[Intel-gfx] [PATCH v3 1/4] drm/i915: Change gamma/degamma_lut_size data type to u32

2019-05-07 Thread Shashank Sharma
ille Syrjälä Cc: Maarten Lankhorst Cc: Uma Shankar Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_device_info.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 5a2e17d6

[Intel-gfx] [PATCH v3 4/4] drm/i915/icl: Add Multi-segmented gamma support

2019-05-07 Thread Shashank Sharma
lle Syrjälä Cc: Maarten Lankhorst Cc: Daniel Vetter Suggested-by: Ville Syrjälä Signed-off-by: Shashank Sharma Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/i915_pci.c| 2 +- drivers/gpu/drm/i915/intel_color.c | 127 - 2 files changed, 124 insertions(

[Intel-gfx] [PATCH v3 0/4] Enable Multi-segmented-gamma for ICL

2019-05-07 Thread Shashank Sharma
This patch series enables programming of Multi-segmented-gamma palette for ICL. Shashank Sharma (3): drm/i915: Change gamma/degamma_lut_size data type to u32 drm/i915: Rename ivb_load_lut_10_max drm/i915/icl: Add Multi-segmented gamma support Uma Shankar (1): drm/i915/icl: Add register

[Intel-gfx] [PATCH v3 2/4] drm/i915/icl: Add register definitions for Multi Segmented gamma

2019-05-07 Thread Shashank Sharma
the end of line. - Change the comment at start of ICL multisegmented gamma registers. Added Ville's r-b Cc: Ville Syrjälä Cc: Jani Nikula Cc: Maarten Lankhorst Reviewed-by: Ville Syrjälä Signed-off-by: Uma Shankar Signed-off-by: Shashank Sharma --- drivers/gpu/drm/

[Intel-gfx] [PATCH v3 3/4] drm/i915: Rename ivb_load_lut_10_max

2019-05-07 Thread Shashank Sharma
This patch renames function ivb_load_lut_10_max to ivb_load_lut_ext_max. V3: Added Vill'es r-b. Cc: Uma Shankar Suggested-by: Ville Syrjala Reviewed-by: Ville Syrjala Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 14 +++--- 1 file changed, 7 inser

[Intel-gfx] [PATCH] drm/i915: Fix skl plane scaling for planner YUV buffers

2019-05-08 Thread Shashank Sharma
From: Lukas Rusak Plane scaling for YUV planar formats should be max 2 times. Cc: Maarten Lankhorst Cc: Juha-pekka Heikkila Cc: Shashank Sharma Signed-off-by: Lukas Rusak --- drivers/gpu/drm/i915/intel_display.c | 13 - 1 file changed, 8 insertions(+), 5 deletions(-) diff

[Intel-gfx] [PATCH v4 3/4] drm/i915: Rename ivb_load_lut_10_max

2019-05-08 Thread Shashank Sharma
This patch renames function ivb_load_lut_10_max to ivb_load_lut_ext_max. V3: Added Vill'es r-b. Cc: Uma Shankar Suggested-by: Ville Syrjala Reviewed-by: Ville Syrjala Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 14 +++--- 1 file changed, 7 inser

[Intel-gfx] [PATCH v4 4/4] drm/i915/icl: Add Multi-segmented gamma support

2019-05-08 Thread Shashank Sharma
ilk_lut_12p4_ldw Cc: Ville Syrjälä Cc: Maarten Lankhorst Cc: Daniel Vetter Reviewed-by: Ville Syrjälä Suggested-by: Ville Syrjälä Signed-off-by: Shashank Sharma Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/i915_pci.c| 2 +- drivers/gpu/drm/i915

[Intel-gfx] [PATCH v4 2/4] drm/i915/icl: Add register definitions for Multi Segmented gamma

2019-05-08 Thread Shashank Sharma
the end of line. - Change the comment at start of ICL multisegmented gamma registers. Added Ville's r-b Cc: Ville Syrjälä Cc: Jani Nikula Cc: Maarten Lankhorst Reviewed-by: Ville Syrjälä Signed-off-by: Uma Shankar Signed-off-by: Shashank Sharma --- drivers/gpu/drm/

[Intel-gfx] [PATCH v4 1/4] drm/i915: Change gamma/degamma_lut_size data type to u32

2019-05-08 Thread Shashank Sharma
ille Syrjälä Cc: Maarten Lankhorst Cc: Uma Shankar V4: Added Uma's r-b. Reviewed-by: Uma Shankar Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_device_info.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/dr

[Intel-gfx] [PATCH v4 0/4] Enable Multi-segmented-gamma for ICL

2019-05-08 Thread Shashank Sharma
This patch series enables programming of Multi-segmented-gamma palette for ICL. Shashank Sharma (3): drm/i915: Change gamma/degamma_lut_size data type to u32 drm/i915: Rename ivb_load_lut_10_max drm/i915/icl: Add Multi-segmented gamma support Uma Shankar (1): drm/i915/icl: Add register

[Intel-gfx] [PATCH 2/3] drm/i915/icl: Add register definitions for Multi Segmented gamma

2019-04-26 Thread Shashank Sharma
From: Uma Shankar Add macros to define multi segmented gamma registers Cc: Ville Syrjälä Cc: Maarten Lankhorst Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/i915_reg.h | 17 + 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/d

[Intel-gfx] [PATCH 1/3] drm/i915: Change gamma/degamma_lut_size data type to u32

2019-04-26 Thread Shashank Sharma
ille Syrjälä Cc: Maarten Lankhorst Cc: Uma Shankar Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_device_info.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 5a2e17d6

[Intel-gfx] [PATCH 3/3] drm/i915/icl: Add Multi-segmented gamma support

2019-04-26 Thread Shashank Sharma
etter Suggested-by: Ville Syrjälä Signed-off-by: Shashank Sharma Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/i915_pci.c| 3 +- drivers/gpu/drm/i915/intel_color.c | 155 - 2 files changed, 156 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm

[Intel-gfx] [PATCH v3 4/4] drm/i915: Enable lspcon initialization

2016-07-05 Thread Shashank Sharma
s for LSPCON display now. This part will be added once the dig_port level AVI-IF series gets merged. V3: Rebase Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_ddi.c | 29 - 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm

[Intel-gfx] [PATCH v3 0/4] Enable lspcon support for GEN9 devices

2016-07-05 Thread Shashank Sharma
in respective patch. Shashank Sharma (4): drm: Helper for lspcon in drm_dp_dual_mode drm/i915: Add lspcon support for I915 driver drm/i915: Parse VBT data for lspcon drm/i915: Enable lspcon initialization drivers/gpu/drm/drm_dp_dual_mode_helper.c | 103 + driver

[Intel-gfx] [PATCH v3 2/4] drm/i915: Add lspcon support for I915 driver

2016-07-05 Thread Shashank Sharma
. V2: addressed ville's review comments - Clean the leftover macros from previous patch set V3: Rebase Signed-off-by: Shashank Sharma Signed-off-by: Akashdeep Sharma Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/intel_drv.h

[Intel-gfx] [PATCH v3 3/4] drm/i915: Parse VBT data for lspcon

2016-07-05 Thread Shashank Sharma
will be noise. Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/i915_drv.h | 5 drivers/gpu/drm/i915/intel_bios.c | 49 +++ 2 files changed, 54 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index

[Intel-gfx] [PATCH v3 1/4] drm: Helper for lspcon in drm_dp_dual_mode

2016-07-05 Thread Shashank Sharma
offsets like 0x40 and 0x41 - remove DP_DUAL_MODE_REV_TYPE2 check while checking lspcon adapter id Signed-off-by: Shashank Sharma --- drivers/gpu/drm/drm_dp_dual_mode_helper.c | 103 ++ include/drm/drm_dp_dual_mode_helper.h | 26 2 files changed, 129 i

[Intel-gfx] [PATCH 0/4]: Picture aspect ratio support in DRM layer

2016-08-03 Thread Shashank Sharma
ndle these new aspect ratios. Shashank Sharma (4): drm: add picture aspect ratio flags drm: Add aspect ratio parsing in DRM layer video: Add new aspect ratios for HDMI 2.0 drm: Add and handle new aspect ratios in DRM layer drivers/gpu/drm/drm_mo

[Intel-gfx] [PATCH 2/4] drm: Add aspect ratio parsing in DRM layer

2016-08-03 Thread Shashank Sharma
in DRM's mode conversion and mode comparision functions, to make sure kernel picks mode with right aspect ratio (as per the VIC). Signed-off-by: Shashank Sharma Signed-off-by: Lin, Jia Signed-off-by: Akashdeep Sharma --- drivers/gpu/drm/drm_modes.c | 31 +++

[Intel-gfx] [PATCH 4/4] drm: Add and handle new aspect ratios in DRM layer

2016-08-03 Thread Shashank Sharma
HDMI 2.0/CEA-861-F introduces two new aspect ratios: - 64:27 - 256:135 This patch: - Adds new DRM flags for to represent these new aspect ratios. - Adds new cases to handle these aspect ratios while converting from user->kernel mode or viseversa. Signed-off-by: Shashank Sharma --- driv

[Intel-gfx] [PATCH 3/4] video: Add new aspect ratios for HDMI 2.0

2016-08-03 Thread Shashank Sharma
HDMI 2.0/CEA-861-F introduces two new aspect ratios: - 64:27 - 256:135 This patch adds enumeration for the new aspect ratios in the existing aspect ratio list. Signed-off-by: Shashank Sharma --- drivers/video/hdmi.c | 4 include/linux/hdmi.h | 2 ++ 2 files changed, 6 insertions(+) diff

[Intel-gfx] [PATCH 1/4] drm: add picture aspect ratio flags

2016-08-03 Thread Shashank Sharma
This patch adds drm flag bits for aspect ratio information Currently drm flag bits don't have field for mode's picture aspect ratio. This field will help the driver to pick mode with right aspect ratio, and help in setting right VIC field in avi infoframes. Signed-off-by: Shash

[Intel-gfx] [RFC 0/2] Enable Nearest-neighbor for Integer mode scaling

2019-09-03 Thread Shashank Sharma
Intel display (ICL), when the upscaling ratio is integer. Shashank Sharma (2): drm/i915: Indicate integer up-scaling ratios drm/i915: Pick nearest-neighbor mode for integer scaling ratios drivers/gpu/drm/i915/display/intel_display.c | 97 ++- .../drm/i915/display

[Intel-gfx] [RFC 2/2] drm/i915: Pick nearest-neighbor mode for integer scaling ratios

2019-09-03 Thread Shashank Sharma
display HW only. Cc: Jani Nikula Cc: Ville Syrjälä Cc: Daniel Vetter Cc: Vivi, Rodrigo Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/display/intel_display.c | 81 +++- drivers/gpu/drm/i915/i915_reg.h | 31 2 files changed, 111 insertions(+),

[Intel-gfx] [RFC 1/2] drm/i915: Indicate integer up-scaling ratios

2019-09-03 Thread Shashank Sharma
Nikula Cc: Ville Syrjälä Cc: Daniel Vetter Cc: Vivi, Rodrigo Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/display/intel_display.c | 21 +++ .../drm/i915/display/intel_display_types.h| 7 +++ 2 files changed, 28 insertions(+) diff --git a/drivers/gpu/drm

[Intel-gfx] [PATCH 0/3] Add scaling filters in DRM layer

2019-10-22 Thread Shashank Sharma
published for the same, which can be seen here: https://patchwork.freedesktop.org/series/66175/ Shashank Sharma (3): drm: Introduce scaling filter mode property drm/i915: Add support for scaling filters drm/i915: Handle nearest-neighbor scaling filter drivers/gpu/drm/drm_atomic_uapi.c

[Intel-gfx] [PATCH 3/3] drm/i915: Handle nearest-neighbor scaling filter

2019-10-22 Thread Shashank Sharma
ntainers can suggest. Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/display/intel_display.c | 102 ++ .../drm/i915/display/intel_display_types.h| 3 + drivers/gpu/drm/i915/i915_reg.h | 31 ++ 3 files changed, 136 insertions(+) diff --git a/drivers/

[Intel-gfx] [PATCH 2/3] drm/i915: Add support for scaling filters

2019-10-22 Thread Shashank Sharma
This patch does the following: - Creates the CRTC property for scaling filter mode (for GEN11 and +). - Applies the chosen filter value while enabling the panel fitter. - Adds CRTC state readouts and comparisons. Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/display/intel_display.c

[Intel-gfx] [PATCH 1/3] drm: Introduce scaling filter mode property

2019-10-22 Thread Shashank Sharma
pick filters like Nearest-neighbor applied for non-blurry outputs. There was a RFC patch series published, to discus the request to enable Integer mode scaling by some of the gaming communities, which can be found here: https://patchwork.freedesktop.org/series/66175/ Signed-off-by: Shashank S

Re: [Intel-gfx] [v12 15/15] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON

2020-11-30 Thread Shashank Sharma
Hello Uma, This expectations from user-space of having to adjust the timings of video mode doesn't seem like a good idea to me. This seems more like a quirk, and it should be better kept in I915 layer itself. Else, it will enforce user space to write a lot of vendor specific code, like: - Is

Re: [Intel-gfx] [v12 15/15] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON

2020-12-01 Thread Shashank Sharma
On 02/12/20 2:17 am, Shankar, Uma wrote: > >> -Original Message- >> From: Intel-gfx On Behalf Of >> Shashank >> Sharma >> Sent: Monday, November 30, 2020 4:43 PM >> To: intel-gfx@lists.freedesktop.org >> Subject: Re: [Intel-gfx] [v12 15

[Intel-gfx] [PATCH v3 0/7] YCBCR 4:2:0/4:4:4 output support for LSPCON

2018-01-05 Thread Shashank Sharma
. Shashank Sharma (7): drm/i915: Add CRTC output format YCBCR 4:2:0 drm/i915: Add CRTC output format YCBCR 4:4:4 drm/i915: Check LSPCON vendor OUI drm/i915: Add AVI infoframe support for LSPCON drm/i915: Write AVI infoframes for MCA LSPCON drm/i915: Write AVI infoframes for Parade LSPCON drm

[Intel-gfx] [PATCH v3 7/7] drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON

2018-01-05 Thread Shashank Sharma
4:4:4 framework ready (except the ABI part) Cc: Ville Syrjala Cc: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_ddi.c| 7 +++ drivers/gpu/drm/i915/intel_dp.c | 10 ++ drivers/gpu/drm/i915/intel_

[Intel-gfx] [PATCH v3 3/7] drm/i915: Check LSPCON vendor OUI

2018-01-05 Thread Shashank Sharma
ten Lankhorst Reviewed-by: Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 6 drivers/gpu/drm/i915/intel_lspcon.c | 69 + 2 files changed, 61 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/driv

[Intel-gfx] [PATCH v3 6/7] drm/i915: Write AVI infoframes for Parade LSPCON

2018-01-05 Thread Shashank Sharma
Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_lspcon.c | 119 +++- 1 file changed, 118 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_lspcon.c b/drivers/gpu/drm/i915/intel_lspcon.c index

[Intel-gfx] [PATCH v3 4/7] drm/i915: Add AVI infoframe support for LSPCON

2018-01-05 Thread Shashank Sharma
ments on last patch of the series Cc: Ville Syrjala Cc: Imre Deak Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_ddi.c| 19 +++--- drivers/gpu/drm/i915/intel_drv.h| 14 ++- drivers/gpu/drm/i915/intel_h

[Intel-gfx] [PATCH v3 2/7] drm/i915: Add CRTC output format YCBCR 4:4:4

2018-01-05 Thread Shashank Sharma
sequence. V3: Added this patch in the series Cc: Ville Syrjälä Cc: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 3 ++- drivers/gpu/drm/i915/intel_display.c | 13 + drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915

[Intel-gfx] [PATCH v3 5/7] drm/i915: Write AVI infoframes for MCA LSPCON

2018-01-05 Thread Shashank Sharma
: Rebase V3: Added r-b from Maarten Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 4 ++ drivers/gpu/drm/i915/intel_hdmi.c | 2 + drivers/gpu/drm/i915/intel_lspcon.c | 80

[Intel-gfx] [PATCH v3 1/7] drm/i915: Add CRTC output format YCBCR 4:2:0

2018-01-05 Thread Shashank Sharma
ond patchset. Cc: Ville Syrjala Cc: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 2 +- drivers/gpu/drm/i915/intel_ddi.c | 2 +- drivers/gpu/drm/i915/intel_display.c | 66 drivers/gpu/drm/i915/intel_drv.h |

[Intel-gfx] [PATCH] drm/i915: Add HAS_NATIVE_HDMI2 macro

2018-01-05 Thread Shashank Sharma
GLK/GEN 10 and higher GEN platfomrs sport native HDMI 2.0 controller. This patch adds a macro HAS_NATIVE_HDMI2, and uses it to make checks in the code more readable. Cc: Vivi Rodrigo Cc: Ville Syrjala Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm

[Intel-gfx] [PATCH] drm/i915: Add LSPCON's information in i915_display_info

2018-04-16 Thread Shashank Sharma
la Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/i915_debugfs.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 785b710..4582757 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++

[Intel-gfx] [PATCH v2 0/4] Picture aspect ratio support in DRM layer

2016-08-09 Thread Shashank Sharma
ndle these new aspect ratios. V2: Fixed review comments from Sean, Emil, Daniel Shashank Sharma (4): drm: add picture aspect ratio flags drm: Add aspect ratio parsing in DRM layer video: Add new aspect ratios for HDMI 2.0 drm: Add and handle new aspect ratios in DRM layer drive

[Intel-gfx] [PATCH v2 2/4] drm: Add aspect ratio parsing in DRM layer

2016-08-09 Thread Shashank Sharma
ormation in DRM's mode conversion and mode comparision functions, to make sure kernel picks mode with right aspect ratio (as per the VIC). V2: Addressed review comments from Sean: - Fix spellings/typo - No need to handle aspect ratio none - Add a break, for default case too Signed-off-by: Sh

[Intel-gfx] [PATCH v2 1/4] drm: add picture aspect ratio flags

2016-08-09 Thread Shashank Sharma
This patch adds drm flag bits for aspect ratio information Currently drm flag bits don't have field for mode's picture aspect ratio. This field will help the driver to pick mode with right aspect ratio, and help in setting right VIC field in avi infoframes. Signed-off-by: Shashank S

[Intel-gfx] [PATCH v2 3/4] video: Add new aspect ratios for HDMI 2.0

2016-08-09 Thread Shashank Sharma
HDMI 2.0/CEA-861-F introduces two new aspect ratios: - 64:27 - 256:135 This patch adds enumeration for the new aspect ratios in the existing aspect ratio list. V2: rebase Signed-off-by: Shashank Sharma Reviewed-by: Sean Paul Cc: Daniel Vetter Cc: Emil Velikov --- drivers/video/hdmi.c | 4

[Intel-gfx] [PATCH v2 4/4] drm: Add and handle new aspect ratios in DRM layer

2016-08-09 Thread Shashank Sharma
HDMI 2.0/CEA-861-F introduces two new aspect ratios: - 64:27 - 256:135 This patch: - Adds new DRM flags for to represent these new aspect ratios. - Adds new cases to handle these aspect ratios while converting from user->kernel mode or vise versa. V2: Rebase Signed-off-by: Shashank Sha

[Intel-gfx] [PATCH v4 0/4] Enable lspcon support for GEN9 devices

2016-08-16 Thread Shashank Sharma
ith respective patch. V4: Addressed review comments from Ville Details available with respective patch. Shashank Sharma (4): drm: Helper for lspcon in drm_dp_dual_mode drm/i915: Add lspcon support for I915 driver drm/i915: Parse VBT data for lspcon drm/i915: Enable lspcon initializa

[Intel-gfx] [PATCH v4 3/4] drm/i915: Parse VBT data for lspcon

2016-08-16 Thread Shashank Sharma
will be noise. V4: Rebase Signed-off-by: Shashank Sharma Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_drv.h | 5 drivers/gpu/drm/i915/intel_bios.c | 49 +++ 2 files changed, 54 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b

[Intel-gfx] [PATCH v4 4/4] drm/i915: Enable lspcon initialization

2016-08-16 Thread Shashank Sharma
s for LSPCON display now. This part will be added once the dig_port level AVI-IF series gets merged. V3: Rebase V4: Rebase Signed-off-by: Shashank Sharma Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_ddi.c | 29 - 1 file changed, 28 insertions(+), 1 del

[Intel-gfx] [PATCH v4 1/4] drm: Helper for lspcon in drm_dp_dual_mode

2016-08-16 Thread Shashank Sharma
t for _HAS_DPCD - Fix enum description, for lspcon_mode. Signed-off-by: Shashank Sharma Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/drm_dp_dual_mode_helper.c | 103 ++ include/drm/drm_dp_dual_mode_helper.h | 26 2 files changed, 129 insertions(+) di

[Intel-gfx] [PATCH v4 2/4] drm/i915: Add lspcon support for I915 driver

2016-08-16 Thread Shashank Sharma
orce check while setting a lspcon mode Signed-off-by: Shashank Sharma Signed-off-by: Akashdeep Sharma Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/intel_drv.h| 13 +++- drivers/gpu/drm/i915/intel_lspcon.c | 127 +

[Intel-gfx] [PATCH 03/11] drm: parse ycbcr 420 vdb block

2017-04-07 Thread Shashank Sharma
tch: https://patchwork.kernel.org/patch/9492327/ so the authorship is maintained. Cc: Ville Syrjala Signed-off-by: Jose Abreu Signed-off-by: Shashank Sharma --- drivers/gpu/drm/drm_edid.c | 54 +++-- drivers/gpu/drm/drm_modes.c | 10 +++-- include/drm/drm_connec

[Intel-gfx] [PATCH 01/11] drm: Add HDMI 2.0 VIC support for AVI info-frames

2017-04-07 Thread Shashank Sharma
dy above 80 char, so checkpatch gives 80 char warning again. - gpu/drm/omapdrm/omap_encoder.c - gpu/drm/i915/intel_sdvo.c Signed-off-by: Shashank Sharma --- drivers/gpu/drm/amd/amdgpu/dce_v10_0.c| 2 +- drivers/gpu/drm/amd/amdgpu/dce_v11_0.c| 2 +- drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

[Intel-gfx] [PATCH 00/11] HDMI YCBCR output handling in DRM layer

2017-04-07 Thread Shashank Sharma
Abreu (1): drm: parse ycbcr 420 vdb block Shashank Sharma (10): drm: Add HDMI 2.0 VIC support for AVI info-frames drm/edid: Complete CEA modedb(VIC 1-107) drm: parse ycbcr420 vcb block drm: parse ycbcr 420 deep color information drm: create hdmi output property drm: set output colorspa

[Intel-gfx] [PATCH 02/11] drm/edid: Complete CEA modedb(VIC 1-107)

2017-04-07 Thread Shashank Sharma
formatting for VIC 93-107 V3: Rebase on drm-tip, added R-B from Jose, Alex. V4: Addressed review comments from Andrzej not to modify the VIC filed for HDMI 1.4b sinks (by adding another patch). Reviewed-by: Jose Abreu Reviewed-by: Alex Deucher Signed-off-by: Shashank Sharma --- drivers

[Intel-gfx] [PATCH 04/11] drm: parse ycbcr420 vcb block

2017-04-07 Thread Shashank Sharma
means first video mode in the svd list, can be supported in ycbcr420 output too. Bit 2 means second video mode from svd list, and so on. Cc: Ville Syrjala Cc: Jose Abreu Signed-off-by: Shashank Sharma --- drivers/gpu/drm/drm_edid.c | 80 +++-- includ

[Intel-gfx] [PATCH 08/11] drm/i915: handle ycbcr outputs

2017-04-07 Thread Shashank Sharma
: Ville Syrjala Cc: Daniel Vetter Cc: Ander Conselvan De Oliveira Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_display.c | 1 + drivers/gpu/drm/i915/intel_drv.h | 3 + drivers/gpu/drm/i915/intel_hdmi.c| 161 ++- 3 files changed, 162

[Intel-gfx] [PATCH 11/11] drm/i915: set colorspace for ycbcr outputs

2017-04-07 Thread Shashank Sharma
When HDMI output is other than RGB, we have to load the corresponding colorspace of output mode. This patch fills the colorspace of AVI infoframe as per the HDMI output mode. Cc: Ville Syrjala Cc: Ander Conselvan De Oliveira Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_hdmi.c

[Intel-gfx] [PATCH 05/11] drm: parse ycbcr 420 deep color information

2017-04-07 Thread Shashank Sharma
: Shashank Sharma --- drivers/gpu/drm/drm_edid.c | 15 +++ include/drm/drm_connector.h | 1 + include/drm/drm_edid.h | 5 + 3 files changed, 21 insertions(+) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index d01b7df..828b781 100644 --- a/drivers/gpu

[Intel-gfx] [PATCH 06/11] drm: create hdmi output property

2017-04-07 Thread Shashank Sharma
, so no changes if you dont set the property. Cc: Ville Syrjala Cc: Jose Abreu Cc: Daniel Vetter Signed-off-by: Shashank Sharma --- drivers/gpu/drm/drm_atomic.c| 2 ++ drivers/gpu/drm/drm_atomic_helper.c | 4 drivers/gpu/drm/drm_connector.c | 31

[Intel-gfx] [PATCH 10/11] drm/i915: prepare ycbcr420 modeset

2017-04-07 Thread Shashank Sharma
DMI ycbcr420 outputs. - Programs PIPE_MISC register for ycbcr420 output. - Adds a new scaler user "HDMI output" to plug-into existing scaler framework. This output is identified with bit 30 of the scaler users bitmap. Cc: Ville Syrjala Cc: Ander Conselvan De Oliveira Signed-off

[Intel-gfx] [PATCH 07/11] drm: set output colorspace in AVI infoframe

2017-04-07 Thread Shashank Sharma
infoframes. Cc: Ville Syrjala Cc: Jose Abreu Signed-off-by: Shashank Sharma --- drivers/gpu/drm/drm_edid.c | 40 include/drm/drm_edid.h | 5 + 2 files changed, 45 insertions(+) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm

[Intel-gfx] [PATCH 09/11] drm/i915: handle csc for ycbcr HDMI output

2017-04-07 Thread Shashank Sharma
andler, to perform RGB->YCBCR conversion as per recommended spec values. Cc: Ville Syrjala Cc: Daniel Vetter Cc: Ander Conselvan De Oliveira Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 49 +++- drivers/gpu/drm/i915/intel_displ

[Intel-gfx] [PATCH] RFC: Design: DRM: Blending pipeline using DRM plane properties

2017-04-24 Thread Shashank Sharma
This patch proposes a RFC design to handle blending of various framebuffers with different color spaces, using the DRM color properties. Signed-off-by: Shashank Sharma --- drivers/gpu/drm/rfc-design-blending.txt | 52 + 1 file changed, 52 insertions(+) create

[Intel-gfx] [PATCH v12 8/8] drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON

2018-10-11 Thread Shashank Sharma
From: Shashank Sharma LSPCON chips can generate YCBCR outputs, if asked nicely :). In order to generate YCBCR 4:2:0 outputs, a source must: - send YCBCR 4:4:4 signals to LSPCON - program color space as 4:2:0 in AVI infoframes Whereas for YCBCR 4:4:4 outputs, the source must: - send YCBCR 4:4:4

[Intel-gfx] [PATCH v12 1/8] drm/i915: Introduce CRTC output format

2018-10-11 Thread Shashank Sharma
checkpatch) V8: Another check[atch warning for alignment V9: Rebase V10: Rebase on top of DSI restructure V11: Addressed review comment from Ville - Set CRTC format for pre-HSW get_pipe_config() function too. Added Ville's R-B Cc: Ville Syrjälä Reviewed-by: Ville Syrjälä Signed-o

[Intel-gfx] [PATCH v12 5/8] drm/i915: Add AVI infoframe support for LSPCON

2018-10-11 Thread Shashank Sharma
changes in intel_git_port fptrs (set_infoframes and infoframe_enabled) Cc: Ville Syrjala Cc: Imre Deak Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_ddi.c| 19 +++--- drivers/gpu/drm/i915/intel_drv.h| 13 +

[Intel-gfx] [PATCH v12 7/8] drm/i915: Write AVI infoframes for Parade LSPCON

2018-10-11 Thread Shashank Sharma
checkpatch warnings for alignment V8: Rebase V9: Rebase V10: Rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_lspcon.c | 117 +++- 1 file changed, 116 insertions

[Intel-gfx] [PATCH v12 6/8] drm/i915: Write AVI infoframes for MCA LSPCON

2018-10-11 Thread Shashank Sharma
From: Shashank Sharma LSPCON is a DP branch device, so LSPCON vendors define specific methods to pass AVI infoframes to the the chip. This patch adds: - a generic wrapper function for writing AVI infoframes for all LSPCON devices. - a vendor specific function to wrire AVI infoframes into MCA

[Intel-gfx] [PATCH v12 2/8] drm/i915: Add CRTC output format YCBCR 4:2:0

2018-10-11 Thread Shashank Sharma
From: Shashank Sharma Currently, we are using a bool in CRTC state (state->ycbcr420), to indicate modeset, that the output format is YCBCR 4:2:0. Now in order to support other YCBCR formats, we will need more such flags. This patch adds a new enum parameter for YCBCR 4:2:0 outputs, in the C

[Intel-gfx] [PATCH v12 3/8] drm/i915: Add CRTC output format YCBCR 4:4:4

2018-10-11 Thread Shashank Sharma
From: Shashank Sharma This patch adds support for YCBCR 4:4:4 CRTC output format. To do this, this patch extends the existing YCBCR 4:2:0 framework by: - Adding new parameter in for YCBCR 4:4:4 enum crtc_iutput_format. - Adding case for YCBCR 4:4:4 in while setting AVI infoframes. - Adding

[Intel-gfx] [PATCH v12 4/8] drm/i915: Check LSPCON vendor OUI

2018-10-11 Thread Shashank Sharma
V5: Rebase V6: Rebase V7: Rebase V8: Rebase V9: Rebase V10: Rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 6 drivers/gpu/drm/i915/intel_lspcon.c | 69 +++

[Intel-gfx] [PATCH v10 6/8] drm/i915: Write AVI infoframes for MCA LSPCON

2018-08-14 Thread Shashank Sharma
le Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 4 ++ drivers/gpu/drm/i915/intel_hdmi.c | 2 + drivers/gpu/drm/i915/intel_lspcon.c | 89 + 3 files changed, 95 insertion

[Intel-gfx] [PATCH v10 2/8] drm/i915: Add CRTC output format YCBCR 4:2:0

2018-08-14 Thread Shashank Sharma
ala Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 2 +- drivers/gpu/drm/i915/intel_ddi.c | 2 +- drivers/gpu/drm/i915/intel_display.c | 72 +--- drivers/gpu/drm/i915/inte

[Intel-gfx] [PATCH v10 7/8] drm/i915: Write AVI infoframes for Parade LSPCON

2018-08-14 Thread Shashank Sharma
checkpatch warnings for alignment V8: Rebase V9: Rebase V10: Rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_lspcon.c | 117 +++- 1 file changed, 116 insertions

[Intel-gfx] [PATCH v10 5/8] drm/i915: Add AVI infoframe support for LSPCON

2018-08-14 Thread Shashank Sharma
e Deak Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_ddi.c| 19 +++--- drivers/gpu/drm/i915/intel_drv.h| 13 +- drivers/gpu/drm/i915/intel_hdmi.c | 13 +++--- drivers/gpu/drm/i915/intel_lsp

[Intel-gfx] [PATCH v10 4/8] drm/i915: Check LSPCON vendor OUI

2018-08-14 Thread Shashank Sharma
V5: Rebase V6: Rebase V7: Rebase V8: Rebase V9: Rebase V10: Rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 6 drivers/gpu/drm/i915/intel_lspcon.c | 69 +++

[Intel-gfx] [PATCH v10 3/8] drm/i915: Add CRTC output format YCBCR 4:4:4

2018-08-14 Thread Shashank Sharma
ngs V8: Rebase V9: Rebase V10: Rebase Cc: Ville Syrjälä Cc: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 3 ++- drivers/gpu/drm/i915/intel_display.c | 13 + drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_hdmi.c

[Intel-gfx] [PATCH v10 1/8] drm/i915: Introduce CRTC output format

2018-08-14 Thread Shashank Sharma
checkpatch) V8: Another check[atch warning for alignment V9: Rebase V10: Rebase on top of DSI restructure Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_crt.c | 3 +++ drivers/gpu/drm/i915/intel_display.c | 17 + drivers/gpu/drm/i915/intel_dp.c | 1 + drive

[Intel-gfx] [PATCH v10 0/8] YCBCR 4:2:0/4:4:4 output support for LSPCON

2018-08-14 Thread Shashank Sharma
using this CRTC output framework. Sharma, Shashank (2): drm/i915: Check LSPCON vendor OUI drm/i915: Write AVI infoframes for MCA LSPCON Shashank Sharma (6): drm/i915: Introduce CRTC output format drm/i915: Add CRTC output format YCBCR 4:2:0 drm/i915: Add CRTC output format YCBCR 4:4:4 drm

[Intel-gfx] [PATCH v10 8/8] drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON

2018-08-14 Thread Shashank Sharma
ne TRANS_MSA_CLRSP_YCBCR (2<<3) V9: Rebase V10: Rebase Cc: Ville Syrjala Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_ddi.c | 7 +++ drivers/gpu/drm/i915/i

[Intel-gfx] [PATCH v11 6/8] drm/i915: Write AVI infoframes for MCA LSPCON

2018-08-14 Thread Shashank Sharma
arning Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 4 ++ drivers/gpu/drm/i915/intel_hdmi.c | 2 + drivers/gpu/drm/i915/intel_lspcon.c | 88

[Intel-gfx] [PATCH v6 6/8] drm/i915: Write AVI infoframes for MCA LSPCON

2018-03-29 Thread Shashank Sharma
rames into MCA LSPCON devices. V2: Rebase V3: Added r-b from Maarten V4: Rebase V5: Rebase V6: Rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 4 ++ drivers/gpu/drm/i915/in

[Intel-gfx] [PATCH v6 1/8] drm/i915: Introduce CRTC output format

2018-03-29 Thread Shashank Sharma
put_format. - Initialize parameters of output_format_str respectively (Jani N). - Call it intel_output_format than crtc_output_format(Ville). - Set output format in pipe_config for every encoder (Ville). - Get rid of extra DRM_DEBUG_KMS during get_pipe_config (Ville) V6: Rebase Signed-off-by: Shash

[Intel-gfx] [PATCH v6 4/8] drm/i915: Check LSPCON vendor OUI

2018-03-29 Thread Shashank Sharma
V5: Rebase V6: Rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 6 drivers/gpu/drm/i915/intel_lspcon.c | 69 + 2 files changed, 61 insertions(+),

[Intel-gfx] [PATCH v6 3/8] drm/i915: Add CRTC output format YCBCR 4:4:4

2018-03-29 Thread Shashank Sharma
khorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 3 ++- drivers/gpu/drm/i915/intel_display.c | 13 + drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_hdmi.c| 2 ++ 4 files changed, 14 insertions(+), 5 deletions(-) diff --git a/d

[Intel-gfx] [PATCH v6 8/8] drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON

2018-03-29 Thread Shashank Sharma
es to accommodate changes in patch 2. Cc: Ville Syrjala Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_ddi.c | 7 +++ drivers/gpu/drm/i915/intel_display.c | 12 dr

[Intel-gfx] [PATCH v6 0/8] YCBCR 4:2:0/4:4:4 output support for LSPCON

2018-03-29 Thread Shashank Sharma
->get_config(). Sharma, Shashank (3): drm/i915: Check LSPCON vendor OUI drm/i915: Write AVI infoframes for MCA LSPCON drm/i915: Write AVI infoframes for Parade LSPCON Shashank Sharma (5): drm/i915: Introduce CRTC output format drm/i915: Add CRTC output format YCBCR 4:2:0 drm/i915:

[Intel-gfx] [PATCH v6 2/8] drm/i915: Add CRTC output format YCBCR 4:2:0

2018-03-29 Thread Shashank Sharma
t Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 2 +- drivers/gpu/drm/i915/intel_ddi.c | 2 +- drivers/gpu/drm/i915/intel_display.c | 72 +--- drivers/gpu/drm/i915/intel_drv.h | 4 +- drivers/gpu/drm/i915/intel_hdmi.c| 6

  1   2   3   4   5   6   7   >