[Intel-gfx] [PATCH] [VPG HSW-A] drm/i915: BUN vol4g[DevHSW] Vblank interrupt on disabled pipe

: Sandeep Ramankutty --- drivers/gpu/drm/i915/i915_irq.c | 51 ++ drivers/gpu/drm/i915/intel_display.c |6 +++- include/drm/drmP.h | 20 + 3 files changed, 70 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH] drm/i915: Add support to change pixel format, tiling mode, tiling offset.

Change: Add support to change the pixel format, base surface address, tiling mode, tiling offset on the flow during the primary plane flip. Issue: This support is needed by hardware composer to meet the performance optimization requirement for 3D benchmark. This patch enables change in pixel form