Hi Dave and Daniel,
The commit 7c5c15dffe1e ("drm/i915/gt: Declare gen9 has 64 mocs entries!")
should actually be sent last week along with the commit
777a7717d60c ("drm/i915/gt: Program mocs:63 for cache eviction on gen9"),
but I had missed that and dim didn't cope with fixes for fixes.
Here goe
On Wed, Dec 09, 2020 at 04:16:36PM -0500, Sean Paul wrote:
> From: Sean Paul
>
> No need to spam syslog/console when we can ignore/fix the flag.
besides that we are calling from multiple places anyway..
>
> Signed-off-by: Sean Paul
Reviewed-by: Rodrigo Vivi
> ---
s initialised")
> Signed-off-by: Chris Wilson
> Cc: "Ville Syrjälä"
> Cc: Rodrigo Vivi
> Cc: H.J. Lu
> Cc: Dave Airlie
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
sub-pipe PG is not present on DG1. Setting these bits can disable
other power gates and cause GPU hangs on video playbacks.
Fixes: 85a12d7eb8fe ("drm/i915/tgl: Fix Media power gate sequence.")
Cc: Dale B Stimson
Cc: Chris Wilson
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/d
Hi Dave and Daniel,
Happy New Year.
Here goes the first pull request targeting 5.12.
drm-intel-next-2021-01-04:
- Display hotplug fix for gen2/gen3 (Chris)
- Remove trailing semicolon (Tom)
- Suppress display warnings for old ifwi presend on our CI (Chris)
- OA/Perf related workaround (Lionel)
-
On Tue, Jan 05, 2021 at 10:36:54AM +0200, Jani Nikula wrote:
> On Tue, 05 Jan 2021, Zhenyu Wang wrote:
> > Ping...
>
> I suppose this should be merged to drm-intel-next (or drm-intel-gt-next,
> or both). It was too late for next-fixes, and it's really not the kind
> of fixes we need to queue to v
On Fri, Oct 16, 2020 at 06:54:11PM +0100, Chris Wilson wrote:
> MEDIA_STATE_VFE only accepts the 'maximum number of threads' in the
> range [0, n-1] where n is #EU * (#threads/EU) with the number of threads
> based on plaform and the number of EU based on the number of slices and
> subslices. This
/-/issues/2024
> Fixes: 47f8253d2b89 ("drm/i915/gen7: Clear all EU/L3 residual contexts")
> Signed-off-by: Chris Wilson
> Cc: Mika Kuoppala
> Cc: Prathap Kumar Valsan
> Cc: Akeem G Abodunrin
> Cc: Jon Bloomfield
> Cc: Rodrigo Vivi
> Cc: Randy Wright
> Cc:
ion_setup(struct intel_engine_cs
> *engine)
>
> GEM_BUG_ON(timeline->hwsp_ggtt != engine->status_page.vma);
>
> - if (IS_HASWELL(engine->i915) && engine->class == RENDER_CLASS) {
> + if (IS_GEN(engine->i915, 7) && engine->class
dual contexts")
> Signed-off-by: Chris Wilson
> Cc: Joonas Lahtinen
> Cc: Jon Bloomfield
> Cc: Rodrigo Vivi
> Cc: sta...@vger.kernel.org # v5.7
> ---
> drivers/gpu/drm/i915/Makefile | 1 +
> .../gpu/drm/i915/gt/intel_ring_submission.c |
On Mon, Jan 11, 2021 at 08:51:23PM +, Chris Wilson wrote:
> Quoting Rodrigo Vivi (2021-01-11 17:35:12)
> > On Sun, Jan 10, 2021 at 03:03:54PM +, Chris Wilson wrote:
> > > MEDIA_STATE_VFE only accepts the 'maximum number of threads' in the
> > > range [
On Fri, Jan 08, 2021 at 05:39:22PM +0530, Tejas Upadhyay wrote:
> We have TGP PCH support for Tigerlake and Rocketlake. Similarly
> now TGP PCH can be used with Cometlake CPU.
>
> Changes since V3 :
> - Rebased to top drm-tip commit
> - dev_priv replaced with i915 for new API
> -
7;s calculated offset to plane SF
register
drm/i915: Fix HTI port checking
Lee Shawn C (1):
drm/i915/rkl: new rkl ddc map for different PCH
Matt Roper (2):
drm/i915/rkl: Add DP vswing programming tables
drm/i915/dg1: Update voltage swing tables for DP
Rodrigo Vivi (2):
On Tue, May 25, 2021 at 04:28:20PM +1000, Dave Airlie wrote:
> https://bugzilla.redhat.com/show_bug.cgi?id=1964252
>
> dmesg below.
> Feel free to point me at any fixes already in flight.
Hi Dave,
sorry for the delay here, but I'd like to just confirm if we are on the
same page that this got fix
On Mon, May 24, 2021 at 10:47:50PM -0700, Daniele Ceraolo Spurio wrote:
> From: Chris Wilson
>
> Allow internal clients to create a pinned context.
>
> v2 (Daniele): export destructor as well, allow optional usage of custom
> vm for maximum flexibility.
>
> Signed-off-by: Chris Wilson
> Signed
err(>->i915->drm, "failed to create VCS ctx for PXP\n");
> + return PTR_ERR(ce);
> + }
> +
> + pxp->ce = ce;
> +
> + return 0;
> +}
> +
> +static void destroy_vcs_context(struct intel_pxp *pxp)
> +{
> + intel_engi
locking, don't pollute dev_priv (Chris)
>
> v3: wait for mei PXP component to be bound.
good idea. it would be useful for the case where the mei side was
checking for the version instead i915 for instance...
>
> Signed-off-by: Huang, Sean Z
> Signed-off-by: Daniele Ceraolo Spur
>
> v2: use gt->uncore->rpm (Chris)
> v3: s/arb_is_in_play/arb_is_valid (Chris), move set-up to the new
> init_hw function
> v4: move interface defs to separate header, set arb_is valid to false
> on fini (Rodrigo)
>
> Signed-off-by: Huang, Sean Z
> Signed-off-by:
to common work function.
> v4: improve comments, simplify wait logic (Rodrigo)
>
> Signed-off-by: Huang, Sean Z
> Signed-off-by: Daniele Ceraolo Spurio
> Cc: Chris Wilson
> Cc: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/Makefile| 1 +
> dr
to common work function.
> v4: improve comments, simplify wait logic (Rodrigo)
>
> Signed-off-by: Huang, Sean Z
> Signed-off-by: Daniele Ceraolo Spurio
> Cc: Chris Wilson
> Cc: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/Makefile| 1 +
> dr
odes, simplify rpm ops (Chris), use the new worker func
> v4: invalidate the objects on suspend, don't re-create the arb sesson on
> resume (delayed to first submission).
>
> Signed-off-by: Huang, Sean Z
> Signed-off-by: Daniele Ceraolo Spurio
> Cc: Chris Wilson
> Cc: Rod
On Mon, May 24, 2021 at 10:47:58PM -0700, Daniele Ceraolo Spurio wrote:
> Now that we can handle destruction and re-creation of the arb session,
> we can postpone the start of the session to the first submission that
> requires it, to avoid keeping it running with no user.
>
> Signed-off-by: Danie
On Tue, Jun 01, 2021 at 02:23:00PM -0700, Daniele Ceraolo Spurio wrote:
>
>
> On 6/1/2021 1:20 PM, Rodrigo Vivi wrote:
> > On Mon, May 24, 2021 at 10:47:50PM -0700, Daniele Ceraolo Spurio wrote:
> > > From: Chris Wilson
> > >
> > > Allow i
Cc: Bommu Krishnaiah
> Cc: Huang Sean Z
> Cc: Gaurav Kumar
> Cc: Ville Syrjälä
> Signed-off-by: Anshuman Gupta
> Signed-off-by: Daniele Ceraolo Spurio
Reviewed-by: Rodrigo Vivi
> ---
> .../gpu/drm/i915/display/intel_atomic_plane.c| 16
> dri
(1 << 20) /* ICL+ */
> #define PLANE_COLOR_PIPE_CSC_ENABLE(1 << 23) /* Pre-ICL */
> #define PLANE_COLOR_CSC_MODE_BYPASS(0 << 17)
> @@ -11276,6 +11277,51 @@ enum skl_power_gate {
>
rr_exit;
> + }
> +
> + return 0;
> +
> +err_exit:
> + mei_cldev_set_drvdata(cldev, NULL);
> + kfree(comp_master);
> + mei_cldev_disable(cldev);
> +enable_err_exit:
> + return ret;
> +}
> +
> +static void mei_pxp_remove(
On Thu, Jun 03, 2021 at 03:07:54PM -0700, Manasi Navare wrote:
> Static analysis identified an issue in skl_crtc_allocate_ddb where
> mbus_offset may be used uninitialized.
> This patch fixes it.
I'm sorry, but I really cannot see what this tool is seeing...
I even tried to look to our internal br
On Fri, Jun 04, 2021 at 06:22:49PM +0300, Mika Kuoppala wrote:
> Rodrigo Vivi writes:
>
> > On Thu, Jun 03, 2021 at 03:07:54PM -0700, Manasi Navare wrote:
> >> Static analysis identified an issue in skl_crtc_allocate_ddb where
> >> mbus_offset may be used uninitial
On Wed, Jun 09, 2021 at 11:56:27AM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Use drm_crtc_mask() instead of hand rolling it.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 5 ++---
> 1 fi
clean up
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 41 +---
> 1 file changed, 19 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_displ
On Wed, Jun 09, 2021 at 11:56:29AM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Sort out the mess with the local variables in
> intel_find_initial_plane_obj(). Get rid of all aliasing pointers
> and use standard naming/types.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i9
e_pipe_wm(struct intel_crtc_state *crtc_state)
> +static int ilk_compute_pipe_wm(struct intel_atomic_state *state,
> +struct intel_crtc *crtc)
> {
> - struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
> - struct intel_cr
On Wed, Jun 09, 2021 at 11:56:31AM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Sort out the mess with the local variables in
> intel_fbdev_init_bios(). Get rid of all aliasing pointers,
> use standard naming/types, and introduc a few more locals
On Wed, Jun 09, 2021 at 11:56:32AM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Clear out the straggler 'intel_crtc' variables.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c| 4 +-
On Wed, Jun 09, 2021 at 03:15:54PM +0300, Ville Syrjälä wrote:
> On Wed, Jun 09, 2021 at 07:36:01AM -0400, Rodrigo Vivi wrote:
> > On Wed, Jun 09, 2021 at 11:56:29AM +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Sort out
On Wed, Jun 09, 2021 at 07:46:28AM -0400, Rodrigo Vivi wrote:
> On Wed, Jun 09, 2021 at 11:56:31AM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Sort out the mess with the local variables in
> > intel_fbdev_init_bios(). Get rid of all aliasing pointe
cape clock with DSI
drm/i915/adl_p: Define and use ADL-P specific DP translation tables
Rodrigo Vivi (1):
Merge drm/drm-next into drm-intel-next
Shaokun Zhang (1):
drm/i915: Remove the repeated declaration
Stanislav Lisovskiy (2):
drm/i915/adl_p: CDCLK crawl support for AD
On Thu, Jun 10, 2021 at 12:39:55PM +0200, Zbigniew Kempczyński wrote:
> We have established previously we stop using relocations starting
> from gen12 platforms with Tigerlake as an exception. We keep this
> statement but we want to enable relocations conditionally for
> Rocketlake and Alderlake un
On Thu, Jun 10, 2021 at 03:44:37PM -0700, Daniele Ceraolo Spurio wrote:
>
>
> On 6/2/2021 11:14 AM, Rodrigo Vivi wrote:
> > On Mon, May 24, 2021 at 10:47:58PM -0700, Daniele Ceraolo Spurio wrote:
> > > Now that we can handle destruction and re-creation of the arb sessio
On Thu, Jun 10, 2021 at 03:58:13PM -0700, Daniele Ceraolo Spurio wrote:
>
>
> On 6/2/2021 9:20 AM, Rodrigo Vivi wrote:
> > On Mon, May 24, 2021 at 10:47:59PM -0700, Daniele Ceraolo Spurio wrote:
> > > From: "Huang, Sean Z"
> > >
> > > During
On Fri, Jun 11, 2021 at 08:09:00AM +0200, Zbigniew Kempczyński wrote:
> On Thu, Jun 10, 2021 at 10:36:12AM -0400, Rodrigo Vivi wrote:
> > On Thu, Jun 10, 2021 at 12:39:55PM +0200, Zbigniew Kempczyński wrote:
> > > We have established previously we stop using relocations startin
On Mon, Jun 14, 2021 at 10:35:30AM +0200, Zbigniew Kempczyński wrote:
> On Fri, Jun 11, 2021 at 04:54:32AM -0400, Rodrigo Vivi wrote:
> > On Fri, Jun 11, 2021 at 08:09:00AM +0200, Zbigniew Kempczyński wrote:
> > > On Thu, Jun 10, 2021 at 10:36:12AM -0400, Rodrigo Vivi wrote:
>
urio
> Signed-off-by: Matt Roper
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 41 +
> drivers/gpu/drm/i915/intel_uncore.c | 55 +++
> drivers/gpu/drm/i915/intel_uncore.h | 6 +++
> 3 files
On Mon, Jun 14, 2021 at 08:34:32PM -0700, Matt Roper wrote:
> Although most of our multicast registers are replicated per-subslice, we
> also have a small number of multicast registers that are replicated
> per-l3 bank instead. For both types of multicast registers we need to
> make sure we steer
On Tue, Jun 15, 2021 at 05:08:20AM -0400, Rodrigo Vivi wrote:
> On Mon, Jun 14, 2021 at 08:34:32PM -0700, Matt Roper wrote:
> > Although most of our multicast registers are replicated per-subslice, we
> > also have a small number of multicast registers that are replicated
> >
On Tue, Jun 15, 2021 at 08:30:23AM -0700, Matt Roper wrote:
> On Tue, Jun 15, 2021 at 05:11:04AM -0400, Rodrigo Vivi wrote:
> > On Tue, Jun 15, 2021 at 05:08:20AM -0400, Rodrigo Vivi wrote:
> > > On Mon, Jun 14, 2021 at 08:34:32PM -0700, Matt Roper wrote:
> > > >
tion
>
> v3: change to GRAPHICS_VER() (Zbigniew)
>
> v4: remove RKL from flag as it is already shipped (Rodrigo)
>
> v5: prepare patch to be used within topic/intel-for-CI branch only
>
> Signed-off-by: Zbigniew Kempczyński
> Cc: Dave Airlie
> Cc: Daniel Vetter
ters when the support for our next upcoming platform arrives.
>
> v2:
> - Use entry->end==0 as table terminator. (Rodrigo)
> - Grab forcewake in wa_list_verify() now that we're using accessors
>that assume forcewake is already held.
>
> Cc: Rodrigo Vivi
>
ialized for real
> use. Multicast register steering is already an area that causes enough
> confusion; no need to complicate it with what's effectively dead code.
>
> v2:
> - Use gt->uncore instead of gt->i915->uncore. (Tvrtko)
> - Use {} as table terminator. (
>
> Signed-off-by: Zbigniew Kempczyński
> Cc: Dave Airlie
> Cc: Daniel Vetter
> Cc: Jason Ekstrand
> Cc: Rodrigo Vivi
> Acked-by: Dave Airlie
> Acked-by: Rodrigo Vivi
> ---
> .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 21 ++-
>
weird PLANE_COLOR_CTL RMW in there. I guess because
> force_black was computed way too late originally, but that is now
> sorted.
I would be hesitant in removing that, but since Juston confirmed that
everything works well for him with these patches, it is fine by me.
Great clean-up.
Reviewed-by
d in the
config menu entry, only in the help.
Cc: Alan Previn
Cc: Daniele Ceraolo Spurio
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/Kconfig | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
ind
We should prefer Display version over the old global "gen" thing.
Of course we are not changing functions and variables and the legacy
there, but at least let's start to document things properly and
set some good examples.
Cc: Jani Nikula
Signed-off-by: Rodrigo Vivi
---
drive
We should stop using the gen name and the "+" to reference
the newer platforms.
And on this case specifically we can simplify the debug
message even further.
Cc: Jani Nikula
Cc: Matthew Brost
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
1 file
We should prefer Graphics and Display version over the
old global "gen" thing. Of course we are not changing functions
and variables and the legacy there, but at least let's start to
document things properly and set some good examples.
Cc: Jani Nikula
Cc: Joonas Lahtinen
Signed-
es.
Cc: Joonas Lahtinen
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 2 +-
drivers/gpu/drm/i915/gt/intel_lrc.c | 8
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
b/
d in the
config menu entry, only in the help.
Cc: Alan Previn
Cc: Daniele Ceraolo Spurio
Signed-off-by: Rodrigo Vivi
Reviewed-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/Kconfig | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/Kconfig b/
We should stop using the gen name and the "+" to reference
the newer platforms.
And on this case specifically we can simplify the debug
message even further.
Cc: Jani Nikula
Cc: Matthew Brost
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
1 file
There's no such thing as gen13. It is either display 13
or graphics 13. Don't propagate the gen12 confusion
further.
Cc: Joonas Lahtinen
Cc: Jani Nikula
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915_reg.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
-mid.h include
Matt Roper (1):
drm/i915/uapi: Add comment clarifying purpose of I915_TILING_* values
Rodrigo Vivi (2):
Merge drm/drm-next into drm-intel-next
drm/i915: Clean up PXP Kconfig info.
Ville Syrjälä (14):
drm/i915: Extend the async flip VT-d w/a to skl/bxt
On Mon, Oct 18, 2021 at 11:25:00AM +0300, Jani Nikula wrote:
> On Fri, 15 Oct 2021, Rodrigo Vivi wrote:
> > There's no such thing as gen13. It is either display 13
> > or graphics 13. Don't propagate the gen12 confusion
> > further.
>
> Reviewed-by: Jani N
On Mon, Oct 18, 2021 at 11:24:21AM +0300, Jani Nikula wrote:
> On Fri, 15 Oct 2021, Rodrigo Vivi wrote:
> > We should stop using the gen name and the "+" to reference
> > the newer platforms.
> > And on this case specifically we can simplify the debug
> > m
On Fri, Oct 29, 2021 at 05:18:01PM -0700, José Roberto de Souza wrote:
> Changing the buffer in the middle of the scanout then entering an
> period of flip idleness will cause part of the previous buffer being
> diplayed to user when PSR is enabled.
>
> So here disabling and scheduling activation
gt; Signed-off-by: Huang, Sean Z
> Signed-off-by: Daniele Ceraolo Spurio
> Cc: Chris Wilson
> Cc: Rodrigo Vivi
ops, I had missed this patch. Sorry
and thanks Alan for the ping.
> ---
> drivers/gpu/drm/i915/Makefile| 1 +
> drivers/gpu/drm/i915/gt/intel_gt_pm.c
On Wed, Sep 15, 2021 at 08:11:54AM -0700, Daniele Ceraolo Spurio wrote:
>
>
> On 9/14/2021 12:13 PM, Rodrigo Vivi wrote:
> > On Fri, Sep 10, 2021 at 08:36:22AM -0700, Daniele Ceraolo Spurio wrote:
> > > From: "Huang, Sean Z"
> > >
> > > Du
IFWIs that do not
> > support PXP, so we need it to be an opt-in until we add support to query
> > the caps from the mei device.
> >
> > Signed-off-by: Daniele Ceraolo Spurio
> > Reviewed-by: Rodrigo Vivi
> > ---
> > drivers/gpu/drm/i915/Kconfig
On Wed, Sep 15, 2021 at 04:53:35PM +0300, Jani Nikula wrote:
> On Fri, 10 Sep 2021, Daniele Ceraolo Spurio
> wrote:
> > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h
> > b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> > new file mode 100644
> > index ..e87550fb9821
> > --- /dev/null
> >
On Wed, Sep 15, 2021 at 11:23:45AM -0400, Rodrigo Vivi wrote:
> On Wed, Sep 15, 2021 at 08:11:54AM -0700, Daniele Ceraolo Spurio wrote:
> >
> >
> > On 9/14/2021 12:13 PM, Rodrigo Vivi wrote:
> > > On Fri, Sep 10, 2021 at 08:36:22AM -0700, Daniele Ceraolo Spurio wro
On Thu, Sep 16, 2021 at 02:06:56PM +0300, Jani Nikula wrote:
> On Wed, 15 Sep 2021, Rodrigo Vivi wrote:
> > On Wed, Sep 15, 2021 at 04:53:35PM +0300, Jani Nikula wrote:
> >> On Fri, 10 Sep 2021, Daniele Ceraolo Spurio
> >> wrote:
> >> > diff --git
ke the GT workaround functions and multicast
> steering setup per-gt.
>
> Cc: Tvrtko Ursulin
> Cc: Daniele Ceraolo Spurio
> Signed-off-by: Venkata Sandeep Dhanalakota
> Signed-off-by: Matt Roper
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/gt/intel_gt.c
work function.
> v4: improve comments, simplify wait logic (Rodrigo)
> v5: unconditionally set interrupts, rename state_attacked var (Rodrigo)
>
> Signed-off-by: Alan Previn
> Signed-off-by: Huang, Sean Z
> Signed-off-by: Daniele Ceraolo Spurio
> Cc: Chris Wilson
> Cc:
put race between pxp_inval and
> context_close, add usage examples (Rodrigo)
can you please add the v10 change explanation here instead of only
in the cover letter? (apply this comment to all the modified patches)
>
> Signed-off-by: Alan Previn
> Signed-off-by: Daniele Ceraolo Sp
On Mon, Sep 20, 2021 at 04:18:10PM +, Teres Alexis, Alan Previn wrote:
>
> On Mon, 2021-09-20 at 12:04 -0400, Rodrigo Vivi wrote:
> > On Fri, Sep 17, 2021 at 09:20:00PM -0700, Alan Previn wrote:
> > > From: "Huang, Sean Z"
> > >
> > > The H
On Tue, Jul 06, 2021 at 04:44:30PM -0700, Lucas De Marchi wrote:
> On Thu, Nov 05, 2020 at 10:02:27AM +0200, Joonas Lahtinen wrote:
> > Quoting Lucas De Marchi (2020-11-05 03:04:22)
> > > On Wed, Nov 04, 2020 at 11:55:15AM +0200, Joonas Lahtinen wrote:
> > > >Quoting Lucas De Marchi (2020-10-27 06:
11+
Matt Roper (3):
drm/i915: Only access SFC_DONE when media domain is not fused off
drm/i915/adl_p: Also disable underrun recovery with MSO
drm/i915/dg2: Memory latency values from pcode must be doubled
Radhakrishna Sripada (1):
drm/i915: Update memory bandwidth parameters
Rodr
rampoline: true if we need to trampoline into privileged execution
I was wondering if we should also return the original text, but this one
here looks better.
Reviewed-by: Rodrigo Vivi
> *
> * Parses the specified batch buffer looking for privilege violations as
> * describe
On Tue, Jul 20, 2021 at 04:25:21PM -0400, Rodrigo Vivi wrote:
> On Tue, Jul 20, 2021 at 01:21:08PM -0500, Jason Ekstrand wrote:
> > In c9d9fdbc108a ("drm/i915: Revert "drm/i915/gem: Asynchronous
> > cmdparser""), the parameters to intel_engine_cmd_parser() we
On Tue, Jul 20, 2021 at 04:04:59PM -0500, Jason Ekstrand wrote:
> On Tue, Jul 20, 2021 at 3:26 PM Rodrigo Vivi wrote:
> >
> > On Tue, Jul 20, 2021 at 04:25:21PM -0400, Rodrigo Vivi wrote:
> > > On Tue, Jul 20, 2021 at 01:21:08PM -0500, Jason Ekstrand wrote:
> >
On Wed, Jul 21, 2021 at 01:10:49PM +0200, Christoph Hellwig wrote:
> Hi all,
>
> I'm trying to test some changes for the gvt code, but even with a baseline
> 5.14-rc2 host and guest the 915 driver does not seem overly happy:
Is this a regression over -rc1 or over 5.13?
Bisect possible?
Could you
On Wed, Jul 21, 2021 at 10:25:27AM -0500, Jason Ekstrand wrote:
> Would you mind pushing? I still don't have those magic powers. :-)
>
> --Jason
>
> On Wed, Jul 21, 2021 at 5:05 AM Rodrigo Vivi wrote:
> >
> > On Tue, Jul 20, 2021 at 04:04:59PM -0500, Jason Ekst
On Wed, Jul 21, 2021 at 09:40:03PM +0100, Christoph Hellwig wrote:
> On Wed, Jul 21, 2021 at 04:43:44PM +0100, Christoph Hellwig wrote:
> > > > I'm trying to test some changes for the gvt code, but even with a
> > > > baseline
> > > > 5.14-rc2 host and guest the 915 driver does not seem overly hap
3ae04c0c7e63 ("drm/i915/bios:
limit default outputs to ports A through F")
Cc: Christoph Hellwig
Fixes: 3ae04c0c7e63 ("drm/i915/bios: limit default outputs to ports A through
F")
Cc: Lucas De Marchi
Cc: Ville Syrjälä
Cc: Jani Nikula
Signed-off-by: Rodrigo Vivi
---
drivers/
ors on awaiting already signaled fences"
drm/i915: Correct the docs for intel_engine_cmd_parser
Rodrigo Vivi (1):
Merge tag 'gvt-fixes-2021-07-15' of https://github.com/intel/gvt-linux
into drm-intel-fixes
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 227 ++---
le Syrjälä
Cc: Jani Nikula
Signed-off-by: Rodrigo Vivi
Reviewed-by: José Roberto de Souza
Reviewed-by: Lucas De Marchi
Tested-by: Christoph Hellwig
---
drivers/gpu/drm/i915/display/intel_bios.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/int
le.
>
> Avoid the issue by splitting versions 9 and 10 in intel_setup_outputs(),
> which also makes it more clear what code path it's taking for each
> version.
>
> Fixes: 5a9d38b20a5a ("drm/i915/display: hide workaround for broken vbt in
> intel_bios.c")
> Cc: Jan
On Thu, Jul 22, 2021 at 03:09:13PM -, Patchwork wrote:
>Patch Details
>
>Series: drm/i915/bios: Fix ports mask (rev2)
>URL: [1]https://patchwork.freedesktop.org/series/92850/
>State: failure
>Details:
>[2]https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20680/i
le Syrjälä
Cc: Jani Nikula
Signed-off-by: Rodrigo Vivi
Reviewed-by: José Roberto de Souza
Reviewed-by: Lucas De Marchi
Tested-by: Christoph Hellwig
---
drivers/gpu/drm/i915/display/intel_bios.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/int
On Fri, Jul 23, 2021 at 05:11:12PM -0700, Lucas De Marchi wrote:
> Remove registers that are not used anymore due to CNL removal and rename
> those that are.
>
> Signed-off-by: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/i915_re
On Fri, Jul 23, 2021 at 05:11:11PM -0700, Lucas De Marchi wrote:
> Replace all remaining handling of GRAPHICS_VER {==,>=} 10 with
> {==,>=} 11. With the removal of CNL, there is no platform with graphics
> version equals 10.
>
> Signed-off-by: Lucas De Marchi
Revi
On Fri, Jul 23, 2021 at 05:11:13PM -0700, Lucas De Marchi wrote:
> Cleanup remaining cases that we find CNL in the codebase.
>
> Signed-off-by: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 2 +-
> drivers/gp
On Fri, Jul 23, 2021 at 05:11:01PM -0700, Lucas De Marchi wrote:
> With the removal of CNL, let's consider GLK as the first platform using
> those constants since GLK has DISPLAY_VER == 10.
>
> Signed-off-by: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
> ---
> drive
else if (GRAPHICS_VER(dev_priv) >= 11)
> + else if (DISPLAY_VER(dev_priv) >= 11)
> for_each_pipe(dev_priv, pipe)
> runtime->num_sprites[pipe] = 6;
> else if (IS_GEMINILAKE(dev_priv))
while at it we could probably change this to DISPLAY_
On Fri, Jul 23, 2021 at 05:11:05PM -0700, Lucas De Marchi wrote:
> Remove references for CNL from pch detection.
for a moment I almost thought you were removing the CNP support...
>
> Signed-off-by: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/
On Sat, Jul 24, 2021 at 10:02:15PM -0700, Lucas De Marchi wrote:
> On Sat, Jul 24, 2021 at 06:41:21PM +0100, Christoph Hellwig wrote:
> > Still tests fine:
> >
> > Tested-by: Christoph Hellwig
>
> I just pushed this to drm-intel-next as part of another series and
> added your Tested-by.
>
> Ro
breakages
> due to changing the headers.
>
> Signed-off-by: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/i915_drv.h | 7 +--
> drivers/gpu/drm/i915/i915_pci.c | 23 +--
> drivers/gpu/drm/i915/i915_perf.
On Fri, Jul 23, 2021 at 05:11:04PM -0700, Lucas De Marchi wrote:
> Only one reference to CNL that is not needed, but code is the same for
> GEN9_BC, so leave the code around and just remove the special
> case for CNL.
>
> Signed-off-by: Lucas De Marchi
Reviewed-b
Signed-off-by: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/skl_universal_plane.c | 14 +++---
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> b/drivers/gpu/drm/i
On Fri, Jul 23, 2021 at 05:11:08PM -0700, Lucas De Marchi wrote:
> With the removal of CNL, let's consider ICL as the first platform using
> those constants.
>
> Signed-off-by: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm
On Fri, Jul 23, 2021 at 05:10:59PM -0700, Lucas De Marchi wrote:
> The only real platform with DISPLAY_VER == 10 is GLK. We don't need to
> handle CNL explicitly in intel_display_power.c.
>
> Signed-off-by: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
> ---
>
CFLAGS=-Wunused drivers/gpu/drm/i915/display/intel_dpll_mgr.o
good idea...
>
> Signed-off-by: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 586 +++---
> drivers/gpu/drm/i915/i915_reg.h | 4 +-
> 2 files
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