Re: [Intel-gfx] [PATCH] drm/i915: Introduce mapping of user pages into video memory (userptr) ioctl

Thanks for the patch, Chris. This is exactly what we were looking for to replace the VMAP feature you submitted a couple of years ago. We need a method to quickly move data from user mode allocations into video memory (by mapping backing pages into the GTT). The Interface appears simple enough

[Intel-gfx] [PATCH] Removed IVB forced enable of sprite dest key

The patch file for this change is attached. Had to send it from Outlook and wanted to avoid corrupting the patch. Hence, the attachment. Armin destkey.patch Description: destkey.patch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://

[Intel-gfx] [PATCH] Mask reserved bits in display/sprite address registers

The patch file for this change is attached. Had to send it from Outlook and wanted to avoid corrupting the patch. Hence, the attachment. Armin mask.patch Description: mask.patch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.

Re: [Intel-gfx] [PATCH] Mask reserved bits in display/sprite address registers

idawsk.net] Sent: Friday, April 06, 2012 4:26 PM To: Reese, Armin C Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH] Mask reserved bits in display/sprite address registers On Thu, 5 Apr 2012 20:48:20 +0000 "Reese, Armin C" wrote: > The patch file for this chan

[Intel-gfx] [PATCH] drm/i915: Mask reserved bits in display/sprite address registers

The attached patch file was updated to reflect reviewer's comments. The only change I did not make was using PAGE_MASK instead of DISP_BASEADDR_MASK. PAGE_MASK is CPU architecture dependent and I didn't want to tie our GPU addressing arch to that of the CPU. Armin mask1.patch Description: m

[Intel-gfx] [PATCH] drm/i915: Removed IVB forced enable of sprite dest key

Prefixed the patch subject with 'drm/i915:'. Nothing else changed. Armin destkey.patch Description: destkey.patch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH] drm/i915: Mask reserved bits in display/sprite address registers

Corrected my name in the patch (acreese -> Armin Reese) ... The attached patch file was updated to reflect reviewer's comments. The only change I did not make was using PAGE_MASK instead of DISP_BASEADDR_MASK. PAGE_MASK is CPU architecture dependent and I didn't want to tie our GPU addressing

[Intel-gfx] SNB/IVB sprite demo

I worked with Jesse Barnes to develop a sprite demo/test program for SNB/IVB. It uses the new IOCTLs: GETPLANERESOURCES, GETPLANE, and SETPLANE. I also intend on using the program as an example of how to set up a mode, display a framebuffer, and display sprite on Intel graphics. The source is

Re: [Intel-gfx] SNB/IVB sprite demo

ary 11, 2012 2:53 AM To: Reese, Armin C Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] SNB/IVB sprite demo Hi Armin, On Sat, Feb 11, 2012 at 01:11:16AM +, Reese, Armin C wrote: > Thanks for letting me know about the GCC warning messages. I did my > final tweeks on the pr

Re: [Intel-gfx] [PATCH] igt/gem_partial_pwrite_pread: Add set-cache subtest to validate JIRA VIZ-3721

Hi Daniel, Is it possible to get this patch on the review board? I've been on vacation a couple of weeks and haven't been around to push it. Thanks, Armin -Original Message----- From: Reese, Armin C Sent: Thursday, June 12, 2014 2:19 PM To: intel-gfx@lists.freedesktop.org

Re: [Intel-gfx] [PATCH] drm/i915: Do not unmap object unless no other VMAs reference it

No bugs have been reported so far ... Daniel caught this by inspection of the Full PPGTT patch set and wanted me to fix it. - Armin -Original Message- From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] Sent: Friday, July 11, 2014 10:21 AM To: Reese, Armin C Cc: intel-gfx

Re: [Intel-gfx] [PATCH] drm/i915: Optimize the i915_gem_gtt_finish_object function

min -Original Message- From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] Sent: Friday, July 11, 2014 10:20 AM To: Reese, Armin C Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH] drm/i915: Optimize the i915_gem_gtt_finish_object function On Fri, Jul 11, 2014 at 10:15:3

Re: [Intel-gfx] [PATCH] drm/i915: Optimize the i915_gem_gtt_finish_object function

So the code should stay the way it is originally and assume GPU idling is always needed? - Armin -Original Message- From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] Sent: Friday, July 11, 2014 10:37 AM To: Reese, Armin C Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx

Re: [Intel-gfx] [PATCH] igt/gem_partial_pwrite_pread: Add set-cache subtest to validate JIRA VIZ-3721

Which of the I-G-Ts would be the best to house the set-cache subtest? Is gem_partial_pwrite_pread a good candidate? - Armin -Original Message- From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter Sent: Friday, June 13, 2014 12:14 AM To: Reese, Armin C Cc: intel

Re: [Intel-gfx] [PATCH] drm/i915: Optimize the i915_gem_gtt_finish_object function

OK, sounds like it's best to ignore this patch then. - Armin -Original Message- From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] Sent: Friday, July 11, 2014 10:49 AM To: Reese, Armin C Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH] drm/i915: Optimiz

Re: [Intel-gfx] [PATCH 1/3] drm/i915 Add golden context support for Gen9

m in manually because the null_state_gen program simply generates the code. Is there a location in the git repository for the standard license header? Thanks, Armin -Original Message- From: Volkin, Bradley D Sent: Friday, September 12, 2014 5:07 PM To: Reese, Armin C Cc: intel-gfx@lists.freedeskto

Re: [Intel-gfx] [PATCH 1/3] tools/null_state_gen: add macro to emit commands with null state

4 5:51 AM To: intel-gfx@lists.freedesktop.org Cc: Reese, Armin C; m...@iki.fi Subject: [PATCH 1/3] tools/null_state_gen: add macro to emit commands with null state In null/golden context there are multiple state commands where the actual state is always zero. For more compact batch representat